document_title: Microprocessor

question_text: in which year were chips used inside the computer for the first time

question_tokens: in which year were chips used inside the computer for the first time

text: Microprocessor

text: Structure[edit]

text: The internal arrangement of a microprocessor varies depending on the age of the design and the intended purposes of the microprocessor. The complexity of an integrated circuit (IC) is bounded by physical limitations of the number of transistors that can be put onto one chip, the number of package terminations that can connect the processor to other parts of the system, the number of interconnections it is possible to make on the chip, and the heat that the chip can dissipate. Advancing technology makes more complex and powerful chips feasible to manufacture.

text: A minimal hypothetical microprocessor might only include an arithmetic logic unit (ALU) and a control logic section. The ALU performs operations such as addition, subtraction, and operations such as AND or OR. Each operation of the ALU sets one or more flags in a status register, which indicate the results of the last operation (zero value, negative number, overflow, or others). The control logic retrieves instruction codes from memory and initiates the sequence of operations required for the ALU to carry out the instruction. A single operation code might affect many individual data paths, registers, and other elements of the processor.

text: As integrated circuit technology advanced, it was feasible to manufacture more and more complex processors on a single chip. The size of data objects became larger; allowing more transistors on a chip allowed word sizes to increase from 4- and 8-bit words up to today's 64-bit words. Additional features were added to the processor architecture; more on-chip registers sped up programs, and complex instructions could be used to make more compact programs. Floating-point arithmetic, for example, was often not available on 8-bit microprocessors, but had to be carried out in software. Integration of the floating point unit first as a separate integrated circuit and then as part of the same microprocessor chip, sped up floating point calculations.

text: Occasionally, physical limitations of integrated circuits made such practices as a bit slice approach necessary. Instead of processing all of a long word on one integrated circuit, multiple circuits in parallel processed subsets of each data word. While this required extra logic to handle, for example, carry and overflow within each slice, the result was a system that could handle, for example, 32-bit words using integrated circuits with a capacity for only four bits each.

text: With the ability to put large numbers of transistors on one chip, it becomes feasible to integrate memory on the same die as the processor. This CPU cache has the advantage of faster access than off-chip memory, and increases the processing speed of the system for many applications. Processor clock frequency has increased more rapidly than external memory speed, except in the recent past,[when?] so cache memory is necessary if the processor is not delayed by slower external memory.

text: Special-purpose designs[edit]

text: A microprocessor is a general purpose system. Several specialized processing devices have followed from the technology:

text:
A digital signal processor (DSP) is specialized for signal processing.
Graphics processing units (GPUs) are processors designed primarily for realtime rendering of 3D images. They may be fixed function (as was more common in the 1990s), or support programmable shaders. With the continuing rise of GPGPU, GPUs are evolving into increasingly general purpose stream processors (running compute shaders), whilst retaining hardware assist for rasterizing, but still differ from CPUs in that they are optimized for throughput over latency, and are not suitable for running application or OS code.
Other specialized units exist for video processing and machine vision.
Microcontrollers integrate a microprocessor with peripheral devices in embedded systems. These tend to have different tradeoffs compared to CPUs.

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text: 32-bit processors have more digital logic than narrower processors, so 32-bit (and wider) processors produce more digital noise and have higher static consumption than narrower processors.[3] Reducing digital noise improves ADC conversion results.[4][5] So, 8- or 16-bit processors can be better than 32-bit processors for system on a chip and microcontrollers that require extremely low-power electronics, or are part of a mixed-signal integrated circuit with noise-sensitive on-chip analog electronics such as high-resolution analog to digital converters, or both.

text: Nevertheless, trade-offs apply: running 32-bit arithmetic on an 8-bit chip could end up using more power, as the chip must execute software with multiple instructions. Modern microprocessors go into low power states when possible,[6] and an 8-bit chip running 32-bit calculations would be active for more cycles. This creates a delicate balance between software, hardware and use patterns, plus costs.[citation needed]

text: When manufactured on a similar process, 8-bit microprocessors use less power when operating and less power when sleeping than 32-bit microprocessors.[7]

text: However, a 32-bit microprocessor may use less average power than an 8-bit microprocessor when the application requires certain operations such as floating-point math that take many more clock cycles on an 8-bit microprocessor than a 32-bit microprocessor so the 8-bit microprocessor spends more time in high-power operating mode.[7][8][9][10]

text: Embedded applications[edit]

text: Thousands of items that were traditionally not computer-related include microprocessors. These include large and small household appliances, cars (and their accessory equipment units), car keys, tools and test instruments, toys, light switches/dimmers and electrical circuit breakers, smoke alarms, battery packs, and hi-fi audio/visual components (from DVD players to phonograph turntables). Such products as cellular telephones, DVD video system and HDTV broadcast systems fundamentally require consumer devices with powerful, low-cost, microprocessors. Increasingly stringent pollution control standards effectively require automobile manufacturers to use microprocessor engine management systems, to allow optimal control of emissions over widely varying operating conditions of an automobile. Non-programmable controls would require complex, bulky, or costly implementation to achieve the results possible with a microprocessor.

text: A microprocessor control program (embedded software) can be easily tailored to different needs of a product line, allowing upgrades in performance with minimal redesign of the product. Different features can be implemented in different models of a product line at negligible production cost.

text: Microprocessor control of a system can provide control strategies that would be impractical to implement using electromechanical controls or purpose-built electronic controls. For example, an engine control system in an automobile can adjust ignition timing based on engine speed, load on the engine, ambient temperature, and any observed tendency for knocking—allowing an automobile to operate on a range of fuel grades.

text: History[edit]

text: The advent of low-cost computers on integrated circuits has transformed modern society. General-purpose microprocessors in personal computers are used for computation, text editing, multimedia display, and communication over the Internet. Many more microprocessors are part of embedded systems, providing digital control over myriad objects from appliances to automobiles to cellular phones and industrial process control.

text: The first use of the term "microprocessor" is attributed to Viatn Computer Systems describing the custom integrated circuit used in their System 21 small computer system announced in 1968.

text: By the late-1960s, designers were striving to integrate the central processing unit (CPU) functions of a computer onto a handful of MOS LSI chips, called microprocessor unit (MPU) chipsets. Building on an earlier Busicom design from 1969, Intel introduced the first commercial microprocessor, the 4-bit Intel 4004, in 1971, followed by its 8-bit microprocessor 8008 in 1972. Building on 8-bit arithmetic logic units (3800/3804) he designed earlier at Fairchild, in 1969, Lee Boysel created the Four-Phase Systems Inc. AL-1 an 8-bit CPU slice that was expandable to 32-bits. In 1970, Steve Geller and Ray Holt of Garrett AiResearch designed the MP944 chipset to implement the F-14A Central Air Data Computer on six metal-gate chips fabricated by AMI.

text: During the 1960s, computer processors were constructed out of small and medium-scale ICs—each containing from tens of transistors to a few hundred. These were placed and soldered onto printed circuit boards, and often multiple boards were interconnected in a chassis. A large number of discrete logic gates uses more electrical power—and therefore produces more heat—than a more integrated design with fewer ICs. The distance that signals have to travel between ICs on the boards limits a computer's operating system speed.

text: In the NASA Apollo space missions to the moon in the 1960s and 1970s, all onboard computations for primary guidance, navigation, and control were provided by a small custom processor called "The Apollo Guidance Computer". It used wire wrap circuit boards whose only logic elements were three-input NOR gates.[11]

text: The first microprocessors emerged in the early 1970s, and were used for electronic calculators, using binary-coded decimal (BCD) arithmetic on 4-bit words. Other embedded uses of 4-bit and 8-bit microprocessors, such as terminals, printers, various kinds of automation etc., followed soon after. Affordable 8-bit microprocessors with 16-bit addressing also led to the first general-purpose microcomputers from the mid-1970s on.

text: Since the early 1970s, the increase in capacity of microprocessors has followed Moore's law; this originally suggested that the number of components that can be fitted onto a chip doubles every year. With present technology, it is actually every two years,[12] and as such Moore later changed the period to two years.[13]

text: First projects[edit]

text: Three projects delivered a microprocessor at about the same time: Intel's 4004 (1971 November, based on an earlier 1969 Busicom design), Garrett AiResearch's Central Air Data Computer (CADC), and Texas Instruments (TI) TMS 1000 (1971 September). Arguably, Four-Phase Systems AL1 microprocessor was also delivered in 1969.

text: Intel 4004 (1969-1971)[edit]

text: The Intel 4004 is generally regarded as the first commercially available microprocessor,[14][15] and cost US$60 (equivalent to $354.82 in 2016).[16] The first known advertisement for the 4004 is dated November 15, 1971 and appeared in Electronic News. The microprocessor was designed by a team consisting of American engineers Marcian Hoff, Stanley Mazor and Federico Faggin and Japanese engineer Masatoshi Shima.[17]

text: The project that produced the 4004 originated in 1969, when Busicom, a Japanese calculator manufacturer, asked Intel to build a chipset for high-performance desktop calculators. Busicom's original design called for a programmable chip set consisting of seven different chips. Three of the chips were to make a special-purpose CPU with its program stored in ROM and its data stored in shift register read-write memory. Ted Hoff, the Intel engineer assigned to evaluate the project, believed the Busicom design could be simplified by using dynamic RAM storage for data, rather than shift register memory, and a more traditional general-purpose CPU architecture. Hoff came up with a four-chip architectural proposal: a ROM chip for storing the programs, a dynamic RAM chip for storing data, a simple I/O device and a 4-bit central processing unit (CPU). Although not a chip designer, he felt the CPU could be integrated into a single chip, but as he lacked the technical know-how the idea remained just a wish for the time being.

text: While the architecture and specifications of the MCS-4 came from the interaction of Hoff with Stanley Mazor, a software engineer reporting to him, and with Busicom engineer Masatoshi Shima, during 1969, Mazor and Hoff moved on to other projects. In April 1970, Intel hired Italian-born engineer Federico Faggin as project leader, a move that ultimately made the single-chip CPU final design a reality (Shima meanwhile designed the Busicom calculator firmware and assisted Faggin during the first six months of the implementation). Faggin, who originally developed the silicon gate technology (SGT) in 1968 at Fairchild Semiconductor[18] and designed the world’s first commercial integrated circuit using SGT, the Fairchild 3708, had the correct background to lead the project into what would become the first commercial general purpose microprocessor. Since SGT was his very own invention, Faggin also used it to create his new methodology for random logic design that made it possible to implement a single-chip CPU with the proper speed, power dissipation and cost. The manager of Intel's MOS Design Department was Leslie L. Vadász at the time of the MCS-4 development but Vadász's attention was completely focused on the mainstream business of semiconductor memories so he left the leadership and the management of the MCS-4 project to Faggin, who was ultimately responsible for leading the 4004 project to its realization. Production units of the 4004 were first delivered to Busicom in March 1971 and shipped to other customers in late 1971.[citation needed]

text: CADC[edit]

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text: In 1968, Garrett AiResearch (who employed designers Ray Holt and Steve Geller) was invited to produce a digital computer to compete with electromechanical systems then under development for the main flight control computer in the US Navy's new F-14 Tomcat fighter. The design was complete by 1970, and used a MOS-based chipset as the core CPU. The design was significantly (approximately 20 times) smaller and much more reliable than the mechanical systems it competed against, and was used in all of the early Tomcat models. This system contained "a 20-bit, pipelined, parallel multi-microprocessor". The Navy refused to allow publication of the design until 1997. For this reason the CADC, and the MP944 chipset it used, are fairly unknown.Ray Holt's autobiographical story of this design and development is presented in the book: The Accidental Engineer.[19] [20]

text: Ray Holt graduated from California Polytechnic University in 1968, and began his computer design career with the CADC. From its inception, it was shrouded in secrecy until 1998 when at Holt's request, the US Navy allowed the documents into the public domain. Since then people[who?] have debated whether this was the first microprocessor. Holt has stated that no one has compared this microprocessor with those that came later.[21] According to Parab et al. (2007),

text: The scientific papers and literature published around 1971 reveal that the MP944 digital processor used for the F-14 Tomcat aircraft of the US Navy qualifies as the first microprocessor. Although interesting, it was not a single-chip processor, as was not the Intel 4004 – they both were more like a set of parallel building blocks you could use to make a general-purpose form. It contains a CPU, RAM, ROM, and two other support chips like the Intel 4004. It was made from the same P-channel technology, operated at military specifications and had larger chips – an excellent computer engineering design by any standards. Its design indicates a major advance over Intel, and two year earlier. It actually worked and was flying in the F-14 when the Intel 4004 was announced. It indicates that today's industry theme of converging DSP-microcontroller architectures was started in 1971.[22]

text: This convergence of DSP and microcontroller architectures is known as a digital signal controller.[23]

text: Four-Phase Systems AL1 (1969)[edit]

text: The Four-Phase Systems AL1 was an 8-bit bit slice chip containing eight registers and an ALU.[24] It was designed by Lee Boysel in 1969.[25][26][27] At the time, it formed part of a nine-chip, 24-bit CPU with three AL1s, but it was later called a microprocessor when, in response to 1990s litigation by Texas Instruments, a demonstration system was constructed where a single AL1 formed part of a courtroom demonstration computer system, together with RAM, ROM, and an input-output device.[28]

text: Pico/General Instrument[edit]

text: In 1971, Pico Electronics[29] and General Instrument (GI) introduced their first collaboration in ICs, a complete single chip calculator IC for the Monroe/Litton Royal Digital III calculator. This chip could also arguably lay claim to be one of the first microprocessors or microcontrollers having ROM, RAM and a RISC instruction set on-chip. The layout for the four layers of the PMOS process was hand drawn at x500 scale on mylar film, a significant task at the time given the complexity of the chip.

text: Pico was a spinout by five GI design engineers whose vision was to create single chip calculator ICs. They had significant previous design experience on multiple calculator chipsets with both GI and Marconi-Elliott.[30] The key team members had originally been tasked by Elliott Automation to create an 8-bit computer in MOS and had helped establish a MOS Research Laboratory in Glenrothes, Scotland in 1967.

text: Calculators were becoming the largest single market for semiconductors so Pico and GI went on to have significant success in this burgeoning market. GI continued to innovate in microprocessors and microcontrollers with products including the CP1600, IOB1680 and PIC1650.[31] In 1987, the GI Microelectronics business was spun out into the Microchip PIC microcontroller business.

text: Gilbert Hyatt[edit]

text: Gilbert Hyatt was awarded a patent claiming an invention pre-dating both TI and Intel, describing a "microcontroller".[32] The patent was later invalidated, but not before substantial royalties were paid out.[33][34]

text: TMS 1000[dubious – discuss][edit]

text: The Smithsonian Institution says TI engineers Gary Boone and Michael Cochran succeeded in creating the first microcontroller (also called a microcomputer) and the first single-chip CPU in 1971. The result of their work was the TMS 1000, which went on the market in 1974.[35] TI stressed the 4-bit TMS 1000 for use in pre-programmed embedded applications, introducing a version called the TMS1802NC on September 17, 1971 that implemented a calculator on a chip.

text: TI filed for a patent on the microprocessor. Gary Boone was awarded U.S. Patent 3,757,306 for the single-chip microprocessor architecture on September 4, 1973. In 1971, and again in 1976, Intel and TI entered into broad patent cross-licensing agreements, with Intel paying royalties to TI for the microprocessor patent. A history of these events is contained in court documentation from a legal dispute between Cyrix and Intel, with TI as inventor and owner of the microprocessor patent.

text: A computer-on-a-chip combines the microprocessor core (CPU), memory, and I/O (input/output) lines onto one chip. The computer-on-a-chip patent, called the "microcomputer patent" at the time, U.S. Patent 4,074,351, was awarded to Gary Boone and Michael J. Cochran of TI. Aside from this patent, the standard meaning of microcomputer is a computer using one or more microprocessors as its CPU(s), while the concept defined in the patent is more akin to a microcontroller.

text: 8-bit designs[edit]

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text: The Intel 4004 was followed in 1972 by the Intel 8008, the world's first 8-bit microprocessor. The 8008 was not, however, an extension of the 4004 design, but instead the culmination of a separate design project at Intel, arising from a contract with Computer Terminals Corporation, of San Antonio TX, for a chip for a terminal they were designing,[36] the Datapoint 2200—fundamental aspects of the design came not from Intel but from CTC. In 1968, CTC's Vic Poor and Harry Pyle developed the original design for the instruction set and operation of the processor. In 1969, CTC contracted two companies, Intel and Texas Instruments, to make a single-chip implementation, known as the CTC 1201.[37] In late 1970 or early 1971, TI dropped out being unable to make a reliable part. In 1970, with Intel yet to deliver the part, CTC opted to use their own implementation in the Datapoint 2200, using traditional TTL logic instead (thus the first machine to run "8008 code" was not in fact a microprocessor at all and was delivered a year earlier). Intel's version of the 1201 microprocessor arrived in late 1971, but was too late, slow, and required a number of additional support chips. CTC had no interest in using it. CTC had originally contracted Intel for the chip, and would have owed them US$50,000 (equivalent to $295,686 in 2016) for their design work.[37] To avoid paying for a chip they did not want (and could not use), CTC released Intel from their contract and allowed them free use of the design.[37] Intel marketed it as the 8008 in April, 1972, as the world's first 8-bit microprocessor. It was the basis for the famous "Mark-8" computer kit advertised in the magazine Radio-Electronics in 1974. This processor had an 8-bit data bus and a 14-bit address bus.[38]

text: The 8008 was the precursor to the successful Intel 8080 (1974), which offered improved performance over the 8008 and required fewer support chips. Federico Faggin conceived and designed it using high voltage N channel MOS. The Zilog Z80 (1976) was also a Faggin design, using low voltage N channel with depletion load and derivative Intel 8-bit processors: all designed with the methodology Faggin created for the 4004. Motorola released the competing 6800 in August 1974, and the similar MOS Technology 6502 in 1975 (both designed largely by the same people). The 6502 family rivaled the Z80 in popularity during the 1980s.

text: A low overall cost, small packaging, simple computer bus requirements, and sometimes the integration of extra circuitry (e.g. the Z80's built-in memory refresh circuitry) allowed the home computer "revolution" to accelerate sharply in the early 1980s. This delivered such inexpensive machines as the Sinclair ZX81, which sold for US$99 (equivalent to $260.80 in 2016). A variation of the 6502, the MOS Technology 6510 was used in the Commodore 64 and yet another variant, the 8502, powered the Commodore 128.

text: The Western Design Center, Inc (WDC) introduced the CMOS WDC 65C02 in 1982 and licensed the design to several firms. It was used as the CPU in the Apple IIe and IIc personal computers as well as in medical implantable grade pacemakers and defibrillators, automotive, industrial and consumer devices. WDC pioneered the licensing of microprocessor designs, later followed by ARM (32-bit) and other microprocessor intellectual property (IP) providers in the 1990s.

text: Motorola introduced the MC6809 in 1978. It was an ambitious and well thought-through 8-bit design that was source compatible with the 6800, and implemented using purely hard-wired logic (subsequent 16-bit microprocessors typically used microcode to some extent, as CISC design requirements were becoming too complex for pure hard-wired logic).

text: Another early 8-bit microprocessor was the Signetics 2650, which enjoyed a brief surge of interest due to its innovative and powerful instruction set architecture.

text: A seminal microprocessor in the world of spaceflight was RCA's RCA 1802 (aka CDP1802, RCA COSMAC) (introduced in 1976), which was used on board the Galileo probe to Jupiter (launched 1989, arrived 1995). RCA COSMAC was the first to implement CMOS technology. The CDP1802 was used because it could be run at very low power, and because a variant was available fabricated using a special production process, silicon on sapphire (SOS), which provided much better protection against cosmic radiation and electrostatic discharge than that of any other processor of the era. Thus, the SOS version of the 1802 was said to be the first radiation-hardened microprocessor.

text: The RCA 1802 had a static design, meaning that the clock frequency could be made arbitrarily low, or even stopped. This let the Galileo spacecraft use minimum electric power for long uneventful stretches of a voyage. Timers or sensors would awaken the processor in time for important tasks, such as navigation updates, attitude control, data acquisition, and radio communication. Current versions of the Western Design Center 65C02 and 65C816 have static cores, and thus retain data even when the clock is completely halted.

text: 12-bit designs[edit]

text: The Intersil 6100 family consisted of a 12-bit microprocessor (the 6100) and a range of peripheral support and memory ICs. The microprocessor recognised the DEC PDP-8 minicomputer instruction set. As such it was sometimes referred to as the CMOS-PDP8. Since it was also produced by Harris Corporation, it was also known as the Harris HM-6100. By virtue of its CMOS technology and associated benefits, the 6100 was being incorporated into some military designs until the early 1980s.

text: 16-bit designs[edit]

text:
Microprocessor modes for the x86 architecture

Real mode (Intel 8086)
8080 emulation mode (NEC V20/V30 only)
Protected mode (Intel 80286)
Unreal mode (Intel 80286)
Virtual 8086 mode (Intel 80386)
System Management Mode (Intel 386SL)
Long mode (AMD Opteron)
x86 virtualization (Intel Pentium 4, models 6x2)

First supported platform shown in parentheses

v
t
e

text: The first multi-chip 16-bit microprocessor was the National Semiconductor IMP-16, introduced in early 1973. An 8-bit version of the chipset was introduced in 1974 as the IMP-8.

text: Other early multi-chip 16-bit microprocessors include one that Digital Equipment Corporation (DEC) used in the LSI-11 OEM board set and the packaged PDP 11/03 minicomputer—and the Fairchild Semiconductor MicroFlame 9440, both introduced in 1975–76. In 1975, National introduced the first 16-bit single-chip microprocessor, the National Semiconductor PACE, which was later followed by an NMOS version, the INS8900.

text: Another early single-chip 16-bit microprocessor was TI's TMS 9900, which was also compatible with their TI-990 line of minicomputers. The 9900 was used in the TI 990/4 minicomputer, the Texas Instruments TI-99/4A home computer, and the TM990 line of OEM microcomputer boards. The chip was packaged in a large ceramic 64-pin DIP package, while most 8-bit microprocessors such as the Intel 8080 used the more common, smaller, and less expensive plastic 40-pin DIP. A follow-on chip, the TMS 9980, was designed to compete with the Intel 8080, had the full TI 990 16-bit instruction set, used a plastic 40-pin package, moved data 8 bits at a time, but could only address 16 KB. A third chip, the TMS 9995, was a new design. The family later expanded to include the 99105 and 99110.

text: The Western Design Center (WDC) introduced the CMOS 65816 16-bit upgrade of the WDC CMOS 65C02 in 1984. The 65816 16-bit microprocessor was the core of the Apple IIgs and later the Super Nintendo Entertainment System, making it one of the most popular 16-bit designs of all time.

text: Intel "upsized" their 8080 design into the 16-bit Intel 8086, the first member of the x86 family, which powers most modern PC type computers. Intel introduced the 8086 as a cost-effective way of porting software from the 8080 lines, and succeeded in winning much business on that premise. The 8088, a version of the 8086 that used an 8-bit external data bus, was the microprocessor in the first IBM PC. Intel then released the 80186 and 80188, the 80286 and, in 1985, the 32-bit 80386, cementing their PC market dominance with the processor family's backwards compatibility. The 80186 and 80188 were essentially versions of the 8086 and 8088, enhanced with some onboard peripherals and a few new instructions. Although Intel's 80186 and 80188 were not used in IBM PC type designs,[dubious – discuss] second source versions from NEC, the V20 and V30 frequently were. The 8086 and successors had an innovative but limited method of memory segmentation, while the 80286 introduced a full-featured segmented memory management unit (MMU). The 80386 introduced a flat 32-bit memory model with paged memory management.

text: The 16-bit Intel x86 processors up to and including the 80386 do not include floating-point units (FPUs). Intel introduced the 8087, 80187, 80287 and 80387 math coprocessors to add hardware floating-point and transcendental function capabilities to the 8086 through 80386 CPUs. The 8087 works with the 8086/8088 and 80186/80188,[39] the 80187 works with the 80186 but not the 80188,[40] the 80287 works with the 80286 and the 80387 works with the 80386. The combination of an x86 CPU and an x87 coprocessor forms a single multi-chip microprocessor; the two chips are programmed as a unit using a single integrated instruction set.[41] The 8087 and 80187 coprocessors are connected in parallel with the data and address buses of their parent processor and directly execute instructions intended for them. The 80287 and 80387 coprocessors are interfaced to the CPU through I/O ports in the CPU's address space, this is transparent to the program, which does not need to know about or access these I/O ports directly; the program accesses the coprocessor and its registers through normal instruction opcodes.

text: 32-bit designs[edit]

text: 16-bit designs had only been on the market briefly when 32-bit implementations started to appear.

text: The most significant of the 32-bit designs is the Motorola MC68000, introduced in 1979.[dubious – discuss] The 68k, as it was widely known, had 32-bit registers in its programming model but used 16-bit internal data paths, three 16-bit Arithmetic Logic Units, and a 16-bit external data bus (to reduce pin count), and externally supported only 24-bit addresses (internally it worked with full 32 bit addresses). In PC-based IBM-compatible mainframes the MC68000 internal microcode was modified to emulate the 32-bit System/370 IBM mainframe.[42] Motorola generally described it as a 16-bit processor. The combination of high performance, large (16 megabytes or 224 bytes) memory space and fairly low cost made it the most popular CPU design of its class. The Apple Lisa and Macintosh designs made use of the 68000, as did a host of other designs in the mid-1980s, including the Atari ST and Commodore Amiga.

text: The world's first single-chip fully 32-bit microprocessor, with 32-bit data paths, 32-bit buses, and 32-bit addresses, was the AT&T Bell Labs BELLMAC-32A, with first samples in 1980, and general production in 1982.[43][44] After the divestiture of AT&T in 1984, it was renamed the WE 32000 (WE for Western Electric), and had two follow-on generations, the WE 32100 and WE 32200. These microprocessors were used in the AT&T 3B5 and 3B15 minicomputers; in the 3B2, the world's first desktop super microcomputer; in the "Companion", the world's first 32-bit laptop computer; and in "Alexander", the world's first book-sized super microcomputer, featuring ROM-pack memory cartridges similar to today's gaming consoles. All these systems ran the UNIX System V operating system.

text: The first commercial, single chip, fully 32-bit microprocessor available on the market was the HP FOCUS.

text: Intel's first 32-bit microprocessor was the iAPX 432, which was introduced in 1981, but was not a commercial success. It had an advanced capability-based object-oriented architecture, but poor performance compared to contemporary architectures such as Intel's own 80286 (introduced 1982), which was almost four times as fast on typical benchmark tests. However, the results for the iAPX432 was partly due to a rushed and therefore suboptimal Ada compiler.[citation needed]

text: Motorola's success with the 68000 led to the MC68010, which added virtual memory support. The MC68020, introduced in 1984 added full 32-bit data and address buses. The 68020 became hugely popular in the Unix supermicrocomputer market, and many small companies (e.g., Altos, Charles River Data Systems, Cromemco) produced desktop-size systems. The MC68030 was introduced next, improving upon the previous design by integrating the MMU into the chip. The continued success led to the MC68040, which included an FPU for better math performance. The 68050 failed to achieve its performance goals and was not released, and the follow-up MC68060 was released into a market saturated by much faster RISC designs. The 68k family faded from use in the early 1990s.

text: Other large companies designed the 68020 and follow-ons into embedded equipment. At one point, there were more 68020s in embedded equipment than there were Intel Pentiums in PCs.[45] The ColdFire processor cores are derivatives of the 68020.

text: During this time (early to mid-1980s), National Semiconductor introduced a very similar 16-bit pinout, 32-bit internal microprocessor called the NS 16032 (later renamed 32016), the full 32-bit version named the NS 32032. Later, National Semiconductor produced the NS 32132, which allowed two CPUs to reside on the same memory bus with built in arbitration. The NS32016/32 outperformed the MC68000/10, but the NS32332—which arrived at approximately the same time as the MC68020—did not have enough performance. The third generation chip, the NS32532, was different. It had about double the performance of the MC68030, which was released around the same time. The appearance of RISC processors like the AM29000 and MC88000 (now both dead) influenced the architecture of the final core, the NS32764. Technically advanced—with a superscalar RISC core, 64-bit bus, and internally overclocked—it could still execute Series 32000 instructions through real-time translation.

text: When National Semiconductor decided to leave the Unix market, the chip was redesigned into the Swordfish Embedded processor with a set of on chip peripherals. The chip turned out to be too expensive for the laser printer market and was killed. The design team went to Intel and there designed the Pentium processor, which is very similar to the NS32764 core internally. The big success of the Series 32000 was in the laser printer market, where the NS32CG16 with microcoded BitBlt instructions had very good price/performance and was adopted by large companies like Canon. By the mid-1980s, Sequent introduced the first SMP server-class computer using the NS 32032. This was one of the design's few wins, and it disappeared in the late 1980s. The MIPS R2000 (1984) and R3000 (1989) were highly successful 32-bit RISC microprocessors. They were used in high-end workstations and servers by SGI, among others. Other designs included the Zilog Z80000, which arrived too late to market to stand a chance and disappeared quickly.

text: The ARM first appeared in 1985.[46] This is a RISC processor design, which has since come to dominate the 32-bit embedded systems processor space due in large part to its power efficiency, its licensing model, and its wide selection of system development tools. Semiconductor manufacturers generally license cores and integrate them into their own system on a chip products; only a few such vendors are licensed to modify the ARM cores. Most cell phones include an ARM processor, as do a wide variety of other products. There are microcontroller-oriented ARM cores without virtual memory support, as well as symmetric multiprocessor (SMP) applications processors with virtual memory.

text: From 1993 to 2003, the 32-bit x86 architectures became increasingly dominant in desktop, laptop, and server markets, and these microprocessors became faster and more capable. Intel had licensed early versions of the architecture to other companies, but declined to license the Pentium, so AMD and Cyrix built later versions of the architecture based on their own designs. During this span, these processors increased in complexity (transistor count) and capability (instructions/second) by at least three orders of magnitude. Intel's Pentium line is probably the most famous and recognizable 32-bit processor model, at least with the public at broad.

text: 64-bit designs in personal computers[edit]

text: While 64-bit microprocessor designs have been in use in several markets since the early 1990s (including the Nintendo 64 gaming console in 1996), the early 2000s saw the introduction of 64-bit microprocessors targeted at the PC market.

text: With AMD's introduction of a 64-bit architecture backwards-compatible with x86, x86-64 (also called AMD64), in September 2003, followed by Intel's near fully compatible 64-bit extensions (first called IA-32e or EM64T, later renamed Intel 64), the 64-bit desktop era began. Both versions can run 32-bit legacy applications without any performance penalty as well as new 64-bit software. With operating systems Windows XP x64, Windows Vista x64, Windows 7 x64, Linux, BSD, and macOS that run 64-bit natively, the software is also geared to fully utilize the capabilities of such processors. The move to 64 bits is more than just an increase in register size from the IA-32 as it also doubles the number of general-purpose registers.

text: The move to 64 bits by PowerPC had been intended since the architecture's design in the early 90s and was not a major cause of incompatibility. Existing integer registers are extended as are all related data pathways, but, as was the case with IA-32, both floating point and vector units had been operating at or above 64 bits for several years. Unlike what happened when IA-32 was extended to x86-64, no new general purpose registers were added in 64-bit PowerPC, so any performance gained when using the 64-bit mode for applications making no use of the larger address space is minimal.[citation needed]

text: In 2011, ARM introduced a new 64-bit ARM architecture.

text: RISC[edit]

text: In the mid-1980s to early 1990s, a crop of new high-performance reduced instruction set computer (RISC) microprocessors appeared, influenced by discrete RISC-like CPU designs such as the IBM 801 and others. RISC microprocessors were initially used in special-purpose machines and Unix workstations, but then gained wide acceptance in other roles.

text: The first commercial RISC microprocessor design was released in 1984, by MIPS Computer Systems, the 32-bit R2000 (the R1000 was not released). In 1986, HP released its first system with a PA-RISC CPU. In 1987, in the non-Unix Acorn computers' 32-bit, then cache-less, ARM2-based Acorn Archimedes became the first commercial success using the ARM architecture, then known as Acorn RISC Machine (ARM); first silicon ARM1 in 1985. The R3000 made the design truly practical, and the R4000 introduced the world's first commercially available 64-bit RISC microprocessor. Competing projects would result in the IBM POWER and Sun SPARC architectures. Soon every major vendor was releasing a RISC design, including the AT&T CRISP, AMD 29000, Intel i860 and Intel i960, Motorola 88000, DEC Alpha.

text: In the late 1990s, only two 64-bit RISC architectures were still produced in volume for non-embedded applications: SPARC and Power ISA, but as ARM has become increasingly powerful, in the early 2010s, it became the third RISC architecture in the general computing segment.

text: Multi-core designs[edit]

text: This section and the sections below needs additional citations for verification. Please help improve this article by adding citations to reliable sources. Unsourced material may be challenged and removed. (March 2012) (Learn how and when to remove this template message)

text: A different approach to improving a computer's performance is to add extra processors, as in symmetric multiprocessing designs, which have been popular in servers and workstations since the early 1990s. Keeping up with Moore's law is becoming increasingly challenging as chip-making technologies approach their physical limits. In response, microprocessor manufacturers look for other ways to improve performance so they can maintain the momentum of constant upgrades.

text: A multi-core processor is a single chip that contains more than one microprocessor core. Each core can simultaneously execute processor instructions in parallel. This effectively multiplies the processor's potential performance by the number of cores, if the software is designed to take advantage of more than one processor core. Some components, such as bus interface and cache, may be shared between cores. Because the cores are physically close to each other, they can communicate with each other much faster than separate (off-chip) processors in a multiprocessor system, which improves overall system performance.

text: In 2001, IBM introduced the first commercial multi-core processor, the monolithic two-core POWER4. Personal computers did not receive multi-core processors until the 2003 introduction, of the two-core Intel Pentium D. The Pentium D, however, was not a monolithic multi-core processor. It was constructed from two dies, each containing a core, packaged on a multi-chip module. The first monolithic multi-core processor in the personal computer market was the AMD Athlon X2, which was introduced a few weeks after the Pentium D. As of 2012[update], dual- and quad-core processors are widely used in home PCs and laptops, while quad-, six-, eight-, ten-, twelve-, and sixteen-core processors are common in the professional and enterprise markets with workstations and servers.

text: Sun Microsystems has released the Niagara and Niagara 2 chips, both of which feature an eight-core design. The Niagara 2 supports more threads and operates at 1.6 GHz.

text: High-end Intel Xeon processors that are on the LGA 775, LGA 1366, and LGA 2011 sockets and high-end AMD Opteron processors that are on the C32 and G34 sockets are DP (dual processor) capable, as well as the older Intel Core 2 Extreme QX9775 also used in an older Mac Pro by Apple and the Intel Skulltrail motherboard. AMD's G34 motherboards can support up to four CPUs and Intel's LGA 1567 motherboards can support up to eight CPUs.

text: Modern desktop computers support systems with multiple CPUs, but few applications outside of the professional market can make good use of more than four cores. Both Intel and AMD currently offer fast quad, hex and octa-core desktop CPUs, making multi-CPU systems obsolete for many purposes. The desktop market has been in a transition towards quad-core CPUs since Intel's Core 2 Quad was released and are now common, although dual-core CPUs are still more prevalent. Older or mobile computers are less likely to have more than two cores than newer desktops. Not all software is optimised for multi-core CPUs, making fewer, more powerful cores preferable.

text: AMD offers CPUs with more cores for a given amount of money than similarly priced Intel CPUs—but the AMD cores are somewhat slower, so the two trade blows in different applications depending on how well-threaded the programs running are. For example, Intel's cheapest Sandy Bridge quad-core CPUs often cost almost twice as much as AMD's cheapest Athlon II, Phenom II, and FX quad-core CPUs but Intel has dual-core CPUs in the same price ranges as AMD's cheaper quad-core CPUs. In an application that uses one or two threads, the Intel dual-core CPUs outperform AMD's similarly priced quad-core CPUs—and if a program supports three or four threads the cheap AMD quad-core CPUs outperform the similarly priced Intel dual-core CPUs.

text: Historically, AMD and Intel have switched places as the company with the fastest CPU several times. Intel currently leads on the desktop side of the computer CPU market, with their Sandy Bridge and Ivy Bridge series. In servers, AMD's new Opterons seem to have superior performance for their price point. This means that AMD are currently more competitive in low- to mid-end servers and workstations that more effectively use fewer cores and threads.

text: Taken to the extreme, this trend also includes manycore designs, with hundreds of cores, with qualitatively different architectures.

text: Market statistics[edit]

text: In 1997, about 55% of all CPUs sold in the world are 8-bit microcontrollers, over two billion of which were sold.[47]

text: In 2002, less than 10% of all the CPUs sold in the world were 32-bit or more. Of all the 32-bit CPUs sold, about 2% are used in desktop or laptop personal computers. Most microprocessors are used in embedded control applications such as household appliances, automobiles, and computer peripherals. Taken as a whole, the average price for a microprocessor, microcontroller, or DSP is just over US$6 (equivalent to $7.99 in 2016).[48]

text: In 2003, about US$44 (equivalent to $57.28 in 2016) billion worth of microprocessors were manufactured and sold.[49] Although about half of that money was spent on CPUs used in desktop or laptop personal computers, those count for only about 2% of all CPUs sold.[48] The quality-adjusted price of laptop microprocessors improved −25% to −35% per year in 2004–2010, and the rate of improvement slowed to −15% to −25% per year in 2010–2013.[50]

text: About ten billion CPUs were manufactured in 2008. Most new CPUs produced each year are embedded.[51]


document_title: East Carolina–NC State rivalry

question_text: nc state vs ecu football all time record

root

text: East Carolina–NC State rivalry

text: Football[edit]

text:
East Carolina–N.C. State rivalry

East Carolina Pirates

NC State Wolfpack

Sport
Football

First meeting
October 10, 1970
NC State 23, East Carolina 6

Latest meeting
September 10, 2016
East Carolina 33, NC State 30

Next meeting
2019

Trophy
Victory Barrel

Statistics

Meetings total
28

All-time series
NC State leads, 16–13 (.551)

Largest victory
NC State, 57–8 (1973)

Longest win streak
NC State, 5 (1978–1982)

Current win streak
East Carolina, 3 (2010–present)

text: The most prominent sport in the rivalry is football. The two teams began competing against each other in 1970. The football series between the two teams was suspended in 1987. Jim Valvano terminated NC State’s scheduling of East Carolina after Pirate fans tore down goal posts and the playing surface at Carter–Finley in 1987. NC State’s athletics administration had publicly warned ECU and Pirate fans after two consecutive years of minor vandalisms to the stadium. The schools would not meet again until the 1992 Peach Bowl. In 1996, the two schools met in Charlotte's Bank of America Stadium rather than on either school's home field. In 1997, the North Carolina Legislature proposed a bill demanding that UNC–CH and N.C. State must play East Carolina on an annual basis. This would officially revive the series between East Carolina and N.C. State.[1]

tag: p

text: East Carolina and NC State have met on the football field 29 times, with 22 of those games played in Carter–Finley Stadium, 4 in Dowdy–Ficklen Stadium, and 3 in neutral venues. The highest profile game was played in the 1992 Peach Bowl, with 59,322 fans in attendance, this game would officially go on record as the largest attendance at the time for a game between two North Carolina college football teams.[2]

text: NC State leads the all-time series, with 16 wins to East Carolina's 13 wins.[3]

text: Victory Barrel[edit]

text: In 2007, the Student Government Associations of both North Carolina State University and East Carolina University in a cooperative agreement began awarding the ‘Victory Barrel’ to the game winner. The outer face of the barrel is affixed with engraved colored plates denoting the year, final score, and winner of each contest dating back to 1970.

text: Football game results[edit]

text:
East Carolina victories
NC State victories

text:
No.
Date
Location
Winner
Score

1
October 10, 1970
Raleigh, NC
NC State
23–6

2
October 23, 1971
Raleigh, NC
East Carolina
31–15

3
October 21, 1972
Raleigh, NC
NC State
38–16

4
September 8, 1973
Raleigh, NC
NC State
57–8

5
October 5, 1974
Raleigh, NC
NC State
24–20

6
September 6, 1975
Raleigh, NC
NC State
26–3

7
September 18, 1976
Raleigh, NC
East Carolina
23–14

8
September 3, 1977
Raleigh, NC
East Carolina
28–23

9
September 9, 1978
Raleigh, NC
NC State
29–13

10
September 8, 1979
Raleigh, NC
NC State
34–20

11
November 11, 1980
Raleigh, NC
NC State
36–14

12
September 19, 1981
Raleigh, NC
NC State
31–10

13
September 11, 1982
Raleigh, NC
NC State
33–26

14
September 10, 1983
Raleigh, NC
East Carolina
22–16

15
September 29, 1984
Raleigh, NC
NC State
31–22

No.
Date
Location
Winner
Score

16
September 7, 1985
Raleigh, NC
East Carolina
33–14

17
September 6, 1986
Raleigh, NC
NC State
38–10

18
September 5, 1987
Raleigh, NC
East Carolina
32–14

19
January 1, 1992
Atlanta, GA
East Carolina
37–34

20
November 30, 1996
Charlotte, NC
East Carolina
50–29

21
November 22, 1997
Raleigh, NC
NC State
37–24

22
November 20, 1999
Greenville, NC
East Carolina
23–6

23
November 27, 2004
Charlotte, NC
NC State
52–14

24
November 25, 2006
Raleigh, NC
East Carolina
21–16

25
October 20, 2007
Greenville, NC
NC State
34–20

26
September 20, 2008
Raleigh, NC
NC State
30–24OT

27
October 16, 2010
Greenville, NC
East Carolina
33–27OT

28
November 23, 2013
Raleigh, NC
East Carolina
42–28

29
September 10, 2016
Greenville, NC
East Carolina
33–30

Series: NC State leads 16–13

text: Baseball[edit]

text:
East Carolina–N.C. State rivalry

East Carolina

NC State

Sport
Baseball

First meeting
1966

Latest meeting
April 29, 2016
ECU 15, NC State 3

Statistics

All-time series
NC State leads 68–42–0

Largest victory
NC State 17, ECU 1
March 15, 1987

text: Since 1966, the two teams have met a total of 109 times. N.C. State leads the record 68–41–0. The two teams regularly qualify for the NCAA Division I Baseball Championship and games often have implications on the national rankings, as both teams are consistently in the top 30.

text: Notable games[edit]

text:
1968: NCAA District 3 Playoffs
East Carolina entered the NCAA Playoff with an opening win against Florida State and advanced to the next round to face N.C. State where they lost 7–5, giving N.C. State a sweep of the Pirates. This would be the first time that the two schools would meet in the tournament, and the two schools would not meet again in the tournament until 1990.[4] East Carolina was eventually knocked out of the tournament by Florida State. N.C. State would advance to the semi-final round of the 1968 College World Series, only to be eliminated by the eventual national champion USC Trojans.[5]


document_title: Philadelphia Badlands

question_text: what is the most dangerous area in philadelphia

text: Philadelphia Badlands

text:
Philadelphia Badlands
Neighborhood of Philadelphia
Philadelphia Badlands
Coordinates: Coordinates: 39°59′46″N 75°08′10″W / 39.996°N 75.136°W / 39.996; -75.136Country
 United StatesState
PennsylvaniaCounty
Philadelphia CountyCity
PhiladelphiaArea code(s)
Area code 215

text: The Philadelphia Badlands is a section of North Philadelphia, Pennsylvania, United States, that is known for an abundance of open-air recreational drug markets and drug-related violence.[1] It has amorphous and somewhat disputed boundaries, but is generally agreed to include the 25th police district.[2]

text: Usually, it is widely understood to be an area between Kensington Avenue to the east and Broad Street to the west, and between Hunting Park Avenue to the north and York Street to the south, mostly coinciding with the neighborhoods of Fairhill, Glenwood, Hunting Park, Harrowgate, Stanton, North Central, West Kensington,   Hartranft, and Kensington.

text: The term The Badlands was popularized in part by the novel Third and Indiana by then Philadelphia Inquirer columnist Steve Lopez.[1] The neighborhood also was featured in several episodes of ABC's Nightline. The intersection of 3rd Street and Indiana Avenue was listed number two in a 2007 list of the city's top ten drug corners according to an article by Philadelphia Weekly reporter Steve Volk.[3]

text: The term Badlands was first used by Lt. John Gallo, who headed the East Division Narcotics Task Force. Its use spread, with many people attempting to take credit for the moniker. It was Gallo's work along with ASAC Billy Retton that worked about a dozen long-term investigations in the 25th and 26th Police Districts that preceded "Operation Sunrise". Open-air drug sales changed completely after this. Ted Koppel, Geraldo Rivera, 20-20 and 48 Hours all rode with Gallo at one time or another, and it was during this time that Gallo was able to make the name stick.

text: At one time a center of heavy industry, much of the Badlands' urban landscape is now characterized by vacant warehouses and tightly-packed strips of brick row houses constructed for the working class of the neighborhood. Like most industrial cities, Philadelphia suffered economic decline following the movement of industry to developing countries and has suffered as a result.

text: The Philadelphia Badlands contain a diverse mix of ethnicities. Puerto Ricans are the largest group,[4][5][6][7] but the area also contains large populations of Black Americans, Irish Americans, and Dominicans. The area encompasses El Centro de Oro, the heart of Philadelphia's Puerto Rican community.  Many drug users from surrounding upscale suburbs make the badlands their home and get stuck in the cycle of addiction which leads to homelessness.  The term "Badlands" sometimes refers to the area's high concentration of street gangs of various ethnicities, and its abundance of open-air drug dealing and heavy users of drugs, especially heroin and cocaine.[8] Although much of the area's crime stems from local neighborhood-based street gangs and the drug trade, larger, more organized gangs also operate in the area, including the Black Mafia, Latin Kings, and various motorcycle gangs.[8]

text: Aside from less-organized gang activity, the Badlands is also known as the founding location and current[when?] turf of the Irish-American organized crime group known as the K&A Gang (also known as the Northeast Philly Irish Mob). Circa 2012 Irish Americans constitute more than 12% of the population of the Badlands.[9]

text: The area's reputation has been countered by community activists and nonprofit organizations such as Centro Nueva Creación, which in 2010 conducted a summer children's program, "The Goodlands Photographers", aimed at helping young people photograph and display positive images of their neighborhood.[2]


document_title: Long service leave

question_text: when did long service leave start in australia

text: Long service leave

text: Long service leave entitlements[edit]

text: Workers in Australia are entitled to long service leave based on legislation of the relevant state or territory, as follows:

text:
Australian Capital Territory: 6.066 weeks on full pay after each period of 7 years continuous service.
New South Wales: 2 months' leave after 10 years continuous service. 1 month's leave for each subsequent 5 years of continuous service.
Northern Territory: 13 weeks on full pay after each period of 10 years continuous service.
Queensland: 8.6667 weeks on full pay after each period of 10 years continuous service.
South Australia: 13 weeks on full pay after each period of 10 years continuous service.
Tasmania: 13 weeks on full pay in respect of the first 15 years continuous service and 8.6667 weeks in respect of every subsequent 10 years continuous service. (For mining workers, the entitlement is 13 weeks in respect of every 10 years of continuous service.)
Victoria: 8.6667 weeks on full pay after each period of 10 years continuous service.[3]
Western Australia: 8.6667 weeks on full pay after each period of 10 years continuous service.

text: Portable LSL[edit]

text: Within a limited number of industries, such as construction, coal mining, contract cleaning industries and the public sector, it is possible to transfer long-service leave entitlements from one employer to another, as long as the employee remains in the same state. Known as portable long service leave this is done mostly through specific legislated schemes which employers in those industries pay into, and which administer the funds for employees.[4]

text: The Australian Senate has recently moved to inquire into portable long service leave schemes. The inquiry will be conducted by the Education and Employment References Committee. The committee will consider how portable schemes might be structured and what role the Australian Federal Government might play in helping to establish a scheme. The committee will also have to evaluate the effect that the differing State long service entitlements will have on a national scheme, as the current state based long service leave provisions are all practically different. As of 11 November 2015, the committee had yet to meet and set dates for submissions and reporting.

text: History[edit]

text: Long service leave is a benefit peculiar to Australia and New Zealand (and possibly some public servants in India) and relates to their colonial heritage. There is a similar system of sabbatical leaves also in Finland.[5] Long service leave developed from the concept of furlough, which stems from the Dutch word verlof (meaning leave) and its usage originates in leave granted from military service.[citation needed]

text: Long service leave was introduced in Australia in the 1860s. The idea was to allow civil servants the opportunity to sail home to England after 10 years’ service in ‘the colonies’. It was 13 weeks for every ten years of service, composed of five weeks to sail back to England, three weeks of leave and five weeks to sail back.

text: In the 19th century, furlough as a benefit as it is now known, was a privilege granted by legislation to the colonial and Indian Services. In Australia, the benefits were first granted to Victorian and South Australian civil servants. The nature of the leave allowed civil servants to sail 'home' to England, safe in the knowledge that they were able to return to their positions upon their return to Australia.[citation needed]

text: The concept spread beyond the public service over the period 1950 to 1975, mainly as a result of pressure from employees seeking comparability with the public service.


document_title: Death education

question_text: when did the modern death awareness movement begin

text: Death education

text: History[edit]

text: Historically death education in American society has been seen as a taboo topic, not worthy of scholarly research or for educational purposes. In the 1960s pioneering professionals like that of Herman Feifel (1959), Elisabeth Kübler-Ross (1969), and Cicely Saunders (1967) encouraged behavioral scientists, clinicians, and humanists to pay attention and to study death-related topics. This initiated the death-awareness movement and began the widespread study of death-related behavior, developing new programs of care for the dying and bereaved, as well as new research on death-related attitudes.[2]

text: Goals[edit]

text: "Death is no enemy of life; it restores our sense of the value of living. Illness restores the sense of proportion that is lost when we take life for granted. To learn about value and proportion we need to honor illness, and ultimately to honor death."[3] Death education honors death by educating about death, dying, and bereavement to enrich personal lives, inform and guide individuals in their transactions with society, prepare individuals for their public roles as citizens, help prepare and support individuals in their professional and vocational roles, and lastly to enhance the ability of individuals to communicate effectively about death-related matters.[4]

text: Hospice[edit]

text: One of the major organizations that educates people on death is Hospice. Hospice[5] offers support for the caregiver, and Hospice also offers information on what to expect before death and what the family can expect after death. One of the major subjects that hospice addresses within death are the myths that come along with death. Hospice will also walk caretakers through the signs and symptoms to look for that signify death. Hospice is an important type of care that helps spread and explain death education to the people. When people have a loved one that is not able to get anymore help from medication or doctors, it would be a good recommendation for them to go to hospice. They would be able to receive great support and comfort during the end of their life journey. Not only does hospice give care to the terminally ill, they also give grief suggestions to family members and close friends. "With proper care, proper support, and love, we can share the miracle that is life". The end of a person’s life should be centered on being alive instead of being dead.

text: Curriculum[edit]

text: Students of a death education course need to clearly understand the complex knowledge of the subject, learn the five key areas of knowledge, and to learn the physical, psycho-social, behavioral, and cognitive aspects of death. The five key areas are: understanding the dying process, decision making for end of life, loss, grief, and bereavement, assessment and intervention, and traumatic death. Death education should be taught in perspective and one’s emotional response should be proportionate to the occasion. In addition death education can be taught formally or informally. Formally planned death education is associated with learning in organized educational settings including: schools, colleges, graduate education, professional workshops, and volunteer training programs.[6]

text: Stages of Grief[edit]

text: There are five stages of grief and loss that were proposed by Elisa Kubler-Ross in her book called, "On Death and Dying". Each stage is going to be different lengths of timespans, with different amounts of intensity depending on the person. The five stages of grief, which are: denial, anger, bargaining, depression, and acceptance, do not always come in order; in fact they usually never do. In the end of your grieving process the last stage is always going to be, achieving a more peaceful acceptance of death (Axelrod). With the knowledge of the five stages of grief, people will be able to understand better how the dying process goes for the ones who death affects. In order to help get you through your grieving process don’t look at the stages as an order you have to follow, instead use the stages as more of guidelines for your grieving process. All people grieve differently so you should not judge someone for grieving differently than you. The first stage is denial and isolation. When you first hear about a loved one who has a deathly illness your first instinct is to deny the reality of the situation. This is known as a defense mechanism because we block out the words by not fully processing them and also hide from the facts. The second stage is anger. Once the blocking out subsides the reality of the situation becomes overwhelming and the pain from the news emerges. The third stage is bargaining. This stage you will feel more vulnerable and helpless. In order to gain control again you’ll start thinking of ways that would have made it better like: • "If only we had sought medical attention sooner…" • "If only we got a second opinion from another doctor…" • "If only we had tried to be a better person toward them…"

text: All of these are defense lines to try and protect us from the reality of pain in a lost one. The fourth stage is depression. In this stage there can be two different types of depression that you deal with. The first type of depression can be a more quiet and private feeling. The second type of depression is the kind where sadness and regret overtake your body and become the predominate factors in your life. The fifth and final stage is acceptance. This stage does not always reach everyone but for the people who actually get it should consider this stage as a gift. It does not mean that you will not be sad anymore but it does mean that there is going to be some kind of peace that you are able to reach with the loved one that died.

text: Summary[edit]

text: Even though people are still conservative towards the idea of death and dying, with help and the education of death, people will come to know death as a natural part of life that everyone will someday have to go through. Instead of being timid and scared of death, people will become comfortable towards the topic and be able to prepare for what will come in the future. Death education is not just for medical professionals and those dealing with the terminally ill but rather death education is beneficial to everyone for it reveals the importance of quality in living and the human search for meaning. "Dying was what human life moved toward and therefore dying was what a human being constantly prepared for."[7]


document_title: Trivia Crack

question_text: what do you use coins for in trivia crack

text: Trivia Crack

text: Gameplay[edit]

text: This section needs additional citations for verification. Please help improve this article by adding citations to reliable sources. Unsourced material may be challenged and removed. (December 2014) (Learn how and when to remove this template message)

text: The game's questions are based on 6 knowledge categories: Entertainment, Art, Sports, History, Science and Geography.[4] The game has 6 cartoonish iconic characters, one to represent each category (for example, a globe to represent the Geography category), which have been recently named (Tito for Geography, Al for Science, Hector for History, Bonzo for Sports, Tina for Art, and Pop for Entertainment). The objective of a Classic-mode game is to answer questions correctly and in doing so, obtain all 6 characters before one's opponent does. In the Classic and Challenge (not to be confused with the Challenge during a classic game) modes, the time limit to answer the given question is 20 seconds, while it is 10 seconds in Trivia Rush.

text: A player may start a new game by pressing the New Game button on the app, as long as they have a "life" in the game. They can choose to play against one of their Facebook friends, a friend they have, or they can play against a random opponent. The player starts with 6 empty slots, one to store each of the characters, and an empty 3-slot "crown gauge." The player tries to populate the crown gauge by spinning a wheel and correctly answering the presented question. The player will repeat this as long as they answer questions correctly or obtains all 6 characters and wins the game. If the player answers a question incorrectly, their turn is over and control of the game is passed to their opponent. The first player cannot get more than 3 characters in the first round, so if the third character is obtained in the first player's first turn the turn ends. The second player can get all 6 characters in the first round.

text: It is also possible to play against any other user of Trivia Crack, even if you or they are not on Facebook, by using the search function and entering a user name. The player will be given a list of user names that are a full or partial match that updates as they type.

text: The wheel consists of 7 slots: 6 category slots (one for each knowledge category), and a 7th special "crown" slot. The player spins the wheel and is then presented with a 4-choice question that is based on the category the wheel lands on. Each time the player answers a question correctly, one slot in the crown gauge is filled. The player has a chance to obtain a character anytime the 3-slot crown gauge is filled by either landing on categories and answering questions correctly 3 times, or by landing on the "crown" slot, which automatically fills the crown gauge and immediately grants the opportunity to obtain a character.

text: Each time the player gains the opportunity to obtain a character, they are asked which way they wish to try for it: the "crown" method or the "challenge" method. If the player chooses the crown method, they are asked to choose which category-based character to try for from a list of characters they have not yet obtained. The player will be presented with a question from the category associated with the character. If the question is answered correctly, the player wins that character and either continues trying for the remaining unattained characters, or wins the game after obtaining all 6 characters. The player can also choose the "challenge" method, which gives them an opportunity to steal a character from his opponent, but in doing so must bet one of their own characters. Challenge mode can only be done if both players have at least one character. In challenge mode, the player is given a series of 6 questions in a row to answer (correctly or incorrectly), then their opponent is given the same questions. If the challenger answers more questions correctly, they are able to steal a character from their opponent. If the challenger loses the challenge, they also lose the character they bet. If there is a tie, the defending player receives an extra question, in which the winner of the challenge is dependant on whether the defender answers the question correctly.

text: A game is over after either one of the players obtains all 6 characters, making them the winner, or a total of 25 rounds have been played. A round is completed each time both players play their turns until they answer a question incorrectly. If 25 rounds are played and neither player has obtained all 6 characters, the player with the most characters will be the winner. If both players have the same number of characters, a 6-question challenge will be presented to each player, and the winner will be the one that answers the most questions. If both players tie the challenge, the player that initially started the game will be the winner.[5]

text: It is possible for a given player to have multiple games in progress at a time. The app's main screen will show the player which games are currently waiting for them to play their turn, which games are waiting for the other player to play their turn, finished games that the player won or lost, games awaiting a Facebook friend's approval, or games a Facebook friend started that are awaiting the player's approval. Each game will list the score, that is, how many characters the player has and how many their opponent has.

text: When starting a game against a Facebook friend, the starting player will play their turns until they answer a question incorrectly, and the game will then be in a pending-approval status. Their Facebook-friend opponent can choose to accept or reject the game, and if they accept, game play continues normally until one of players obtains 6 characters or 25 rounds are completed. If a player chooses to start a game against a random opponent, the player will play their turn until they answer incorrectly, then will be randomly matched up with an opponent who has recently played his/her turns. If the starting player gets three characters without missing a question, the game will inform the player that they cannot get more than three characters before the opponent has a chance to play.

text: When a game's turn is passed to a player (from the opponent answering incorrectly), the game will wait up to 72 hours for that player to play their turn. If 72 hours pass and the player has not played his/her turns, the game will force the player to forfeit.

text: A challenge mode is also available. The player names the challenge and then invites friends to play. This will cost the player who started the game a life and all friends who accept the challenges one too. Each player is given the same 12 questions, 2 from each category. The winner is the player who gets the most questions right in the quickest time. The winner gets a set number of coins based on how many players have accepted the challenge.

text: Free spins[edit]

text: A newly created player starts with 3 "free spins." If a player spins the wheel and lands on a category they consider difficult, the player may use one of their free spins to spin the wheel again in the hopes of landing on a different category. If a player runs out of free spins, they can request more from their Facebook friends. Free spins are no longer purchaseable.

text: Power-ups and coins[edit]

text: The game makes three power-ups available; three in the standard game and two in "challenge mode," which players can use to help answer a question. Using a power-up costs coins, and each power-up costs a different amount. Coins can be obtained by either the player purchasing them, winning them in challenges/standard games, obtaining them by reaching certain game milestones, or by using a prize card from a gem machine.

text: (1.) Bomb: Using this power-up "blows away" (discards) two randomly selected wrong answers, narrowing the player's choices down to the correct answer and a remaining wrong answer.

text: (2.) Double Chance: If this power-up is used before guessing an answer, the player gets a second chance to pick the correct answer should they answer incorrectly the first time.

text: (3.) Skip: This allows the player to skip over a question to a new one in the same category.

text: In all cases, only one power-up can be used. Once a power-up is used, all power-ups are disabled until the player answers. If the player answers correctly, power-ups will be available for use for the next question. If the player answers incorrectly, power-ups will also be available in the next question, however whether or not the question is answered correctly, the cost and choice to use the power-up is final.

text: Lives[edit]

text: "Lives" serve as a mechanism to throttle how often new games can be started, and also provide an in-app revenue opportunity for the developer. Each time a player starts a game by pressing the New Game button, or accepts a Facebook friend's request to play against them, they are charged a Life. A player can have as many lives as they wish, and as they spend lives, the game will automatically replenish one life every hour, provided they are below 5 lives, until the player returns to a full charge of 5 lives. A heart icon on the app's main screen shows how many lives the player currently has, and if they have less than 5, a timer will also display that ticks down in real time to show how long until the next replenishment. If the player runs out of lives, they must wait for replenishment before they can start any new games or approve a new game started against them by a Facebook friend. A player who does not want to wait can either request lives from their Facebook friends, or can buy lives through an in-app purchase.

text: When the app is updated, players are offered the opportunity to buy unlimited lives.

text: Running out of lives does not affect games that are already in progress, and these games can continue to be played in the meantime when it becomes the player's turn.

text: A newly updated Trivia Crack allows players to replenish one life by watching a video. Watching ads are one of the ways this free mobile app makes money.

text: Freebies[edit]

text: A game update introduced freebies, where the player can collect free coins, lives, and gems. Initially, the player starts with 2 cards, which allows the player to collect 1 life and a coin. The game will then undergo a tutorial (unless skipped by the user) to claim another card for free. Answering 50 questions correctly (they do not have to be consecutive) awards the player with a gem, which they can spend to buy new cards. Cards are available in four rarities, Common, Aqua, Gold, and Black, and is representative of how great the card is. Three machines are available, using 1 Gem, 3 Gems, and 5 Gems per card. Machines do not have an unlimited number of cards; a number above the 'Push' button tells the user how many cards are remaining in the machine, and tapping the question mark beside the machine name will inform the user of how many of each rarity of card remains in the machine. Seasonal machines occasionally appear next to the three machines, and can be purchased at 1 or 2 Gems for the first card per day, then 5 Gems. In the mobile versions, a VIP machine is available, and only contains cards that the player has not yet acquired from seasonal machines, but the number of gems needed to obtain one of these cards does not stay the same, and increases in number as fewer cards remain in it. Duplicate cards can also be traded in with five duplicates giving a player per one gem in return for the exchange, with three trade-ins allowed every four hours. Once the player has collected the 5 obtainable cards in a set, the sixth card, a 'Prize Card', is unlocked, and is usually better than all of the other cards in the set. If the player has enough Gems, they can also opt to 'Push x9', to get nine cards from that machine.

text: Trivia Rush[edit]

text: A new game update introduced Trivia Rush, in which two players compete head-to-head in 5 questions for coins. A player chooses from 4 entry fees to compete with another player, then a computer-controlled wheel will choose a category for a question. The two players then compete to answer the questions - the winner is determined by the most questions correct out of 5, and wins slightly less than double the entry fee. In case of a tie, half of the winning prize is refunded, making Trivia Rush unprofitable or very slightly profitable in the long run.