document_title: Forged in Fire (TV series)

question_text: how many episodes are in season 5 of forged in fire

root

text: Forged in Fire (TV series)

text: Format[edit]

text: The series is filmed in Brooklyn, New York.[1][2][3][6] The set, referred to as "The Forge," is stocked with a wide range of metalworking equipment, including propane forges, coal forges, grinders, power hammers and hydraulic presses. Medical personnel are present to treat any injuries or other health problems and may, at their discretion, disqualify smiths who are unable to continue safely. At the end of each round, the smith whose weapon is judged to be the least satisfactory must surrender it and leave the competition.

tag: p

text: In the first round, the four smiths are presented with a starting material that they must use to forge a blade. In some episodes, they all begin with the same material; in others, they may choose from an assortment of metal objects or must salvage their material from a source such as a junked car or lawnmower. Willis states one set of criteria concerning blade or blade/tang length, and often a second set for a feature that must be incorporated, such as serrations or a fuller groove; not all competitions require a special feature. The smiths are typically given 10 minutes to sketch out their designs, but this time is occasionally extended or omitted altogether. Following the design period, they are given a set length of time to forge their blades; they are not required to adhere to their original designs. Once time expires, the judges evaluate the blades based on Willis' criteria and inspect their workmanship, quality, and design, then deliberate privately before announcing their decision. Any smiths who fail to meet the criteria, or who fail to turn in a blade at all, are subject to immediate elimination.

text: For the second round, the three remaining smiths are given an additional length of time to turn their blades into fully operational weapons. They must attach a handle, choosing from a range of provided materials and incorporating any special feature stated by Willis, and grind, sharpen, and polish the blades. They may also address any flaws or issues pointed out by the judges in the first round, if they choose to do so. After the time expires, the judges put each weapon through a series of tests to gauge properties such as sharpness, durability, and ease of use. For these tests, the weapons are used to chop/slash/stab objects that include ropes, ice blocks, animal carcasses, and steel car doors. If a weapon suffers catastrophic failure, defined as damage that renders it unsafe or ineffective for further testing, its maker is immediately disqualified. The judges may, at their discretion, choose not to subject a weapon to a particular test if it is sufficiently cracked or flawed.

text: The working time in each of the first two rounds is typically three hours, but may be extended to four hours if an added feature poses a sufficient challenge, such as being required to forge a billet with modern damascus steel methods and use it for the blade.

text: In the third round, the two remaining smiths are shown a historically significant (and technically difficult) weapon and are given five days to create a version of it. They return to their home forges to do the work and comply with any specifications set by Willis. Afterwards, they return to the Forge and submit their weapons for testing against objects and environments similar to the historical scenarios in which they were typically used. Based on the test results, the judges select one smith to receive the $10,000 prize.

text: Special episodes[edit]

text: The "Master & Apprentice" episode in Season 4 featured four master/apprentice pairs of smiths. Only one member of each pair was allowed to work at any time, trading off every 30 minutes in the first two rounds, and every day in the third. The non-working member was allowed to offer advice. For this episode, the forging time in the first round was extended to three and a half hours.

text: The "Ultimate Champions Edition" (season 4) and "Rookies Edition" (season 5) each featured five smiths instead of four. The smiths were required to forge a particular type of blade at their homes and bring those weapons to the studio for a preliminary test. One smith was eliminated based on the results of this test, after which the competition proceeded through the normal three rounds.

text: Cast, judges, and producers[edit]

text: Wil Willis is a former Army Ranger and decorated Air Force para-rescue specialist.[1][3][6] Willis' previous television experience includes Special Ops Mission and Triggers, two series that aired on the former Military Channel.[2]

text: J. Neilson, a knife and sword expert,[1] holds the rank of Master Smith within the American Bladesmith Society. He has over 20 years' experience in making knives and edged weapons.[2][6] He examines the weapons' technical qualities and tests their durability.[3] In Season 3, Neilson took a leave of absence in order to have surgery on his hand; Jason Knight, another ABS Master Smith, filled his seat on the judges' panel during that time. Neilson appeared alongside Knight for the Season 4 premiere, then resumed his seat in the eighth episode. Starting with the 21st episode of the fourth season, he was replaced by two-time Forged in Fire champion Ben Abbott.

text: David Baker, a Hollywood prop maker who has appeared on the Spike series Deadliest Warrior,[3] is an authority on weapons history[1] and an expert on replicating period-accurate weapons for both museums and films.[2][6] He judges the weapons' historical accuracy and aesthetic beauty.[3]

text: Doug Marcaida, an edged-weapons specialist, is a U.S. military contractor, martial arts instructor and knife designer for FOX Knives Italy. Specializing in the Southeast Asian fighting style of Kali, he has taught classes in weapon awareness and use for military, law enforcement, and security organizations. Marcaida evaluates the smiths' weapons to determine their effectiveness in combat.[3] When he cannot test the smiths' weapons himself due to injury, he has a co-worker or family member perform this task in his place.

text: Tim Healy and Steve Ascher are executive producers for History.[1][6] Jodi Flynn, Brent Montgomery, David George, Shawn Witt and Simon Thomas are executive producers for Outpost Entertainment.[1][6]  Healy observed the demonstration, and later the filming, from the sidelines. Healy says that the inspiration for Forged in Fire came from his and other developers' love of food competition shows such as Chopped and Iron Chef.[3] However, in order to appeal to the History channel's audience, they decided to have the competition focus on historical weaponry.[3]

text: Episodes[edit]

text: Season 1 (2015)[edit]

text:
Episode

Airdate

Title

Results

1st place

2nd place

3rd place

4th place

1

Jun 22, 2015

"Japanese Katana"

Matthew Parkinson

Rich Greenwood

Billy Helton

Joe Waites

2

Jun 29, 2015

"Chakram"

Chris Farrell

Trenton Tye

Grant Marcoux

Chad Harding

3

Jul 3, 2015

"Viking Battle Axe"

Ryu Lim

Jonathan Porter

Phil Evans

James Huse

4

Jul 13, 2015

"Katar"

David Goldberg

Jaime L. Vining

Jimmy Seymour

Arnon Andrey Kartmazov

5

Jul 20, 2015

"Crusader Sword"

Peter Swarz-Burt

David Roeder

Matt Venier

Gabriel Bell

6

Jul 27, 2015

"The Elizabethan Rapier"

Guy Harris

Peter Martin

Peter Szymanski

JD Smith

7

Aug 3, 2015

"The Roman Gladius"

Jamie Lundell

Mareko Maumasi

Maxon McCarter

Adam Ison

8

Aug 10, 2015

"The Moro Kris"

Mace Vitale

Murray Carter

Ray Kirk

Jason Morrissey

text: Season 2 (2016)[edit]

text:
Episode

Airdate

Title

Results

1st place

2nd place

3rd place

4th place

1

Feb 16, 2016

"The War Hammer"

Craig Camerer

Jeff Bridgers

Kim Stahl

Harry Harkins

2

Feb 20, 2016

"Khopesh"

Salem Straub

Craig Trnka

Chris Marks

Zack Jonas

3

Mar 1, 2016

"The Scottish Claymore"

Scott Thomas

Jonathan Wick

Erin Simmons

Earl Blackmore

4

Mar 8, 2016

"Spiked Shield"

Ilya Alekseyev

Michael Coffey

Tim Hintsala

John Gruber

5

Mar 15, 2016

"Viking Sword"

Travis Wuertz

Morgan Medlen

Tom Ward

Mardi Meshejian

6

Mar 22, 2016

"Nepalese Kukri"

Jason Reddick

Josh Weston

Kelly Potter

Jason Ritchie

7

Mar 29, 2016

"The Shotel"

Burt Foster

Chad Osborne

Kevin Klein

Erin Aylor

8

Apr 5, 2016

"The Cutlass"

Tobin Nieto

Ron Mezile

Bob Brandel

Kyle Gahagan

9

Apr 12, 2016

"The Khanda"

Ben Abbott

Tom McGinnis

Brent Stubblefield

Nathan Zimmerman

10

Apr 19, 2016

"The Tabar"

Ted Thompson

Rob "Deker" Dekelbaum

Robert Burns

Edward Kim

text: Season 3 (2016–17)[edit]

text:
Episode

Airdate

Title

Results

1st place

2nd place

3rd place

4th place

1

Aug 23, 2016

Champions Edition[note 1] – "Scottish Claymore"

Ben Abbott

Matthew Parkinson

Salem Straub

Burt Foster

2

Aug 20, 2016

Fan Favorites[note 2] – "Hook Sword"

David Roeder

Rich Greenwood

Kelly Potter

Ryu Lim

3

Sep 6, 2016

"Butterfly Swords"

Shayne Carter

Andy Alm

Harry Burdett

Michael Allenson (né Hoopes)

4

Sep 13, 2016

"The Falcata"

Kelly Vermeer-Vella

Justin Jones

Will Bagley

Frank Christensen

5

Sep 20, 2016

"Kora Sword"

Liam Hoffman

Josh Smith

Paul Happy

Robby Bowman

6

Sep 27, 2016

"Hunga Munga"

Jared Williams

Eric Anthony Leong

Ryan Lewis

Harlan Whitman

7

Oct 4, 2016

"The Boar Spear"

Allen Newberry

Clayton Cowart

Mike Shindel

Chase Wilder

8

Oct 11, 2016

"Xiphos Sword"

Keith Hill

Jon Maynard

Sam Rutherford

Riley Butz

9

Oct 18, 2016

"The Pandat"

Pete Winkler

Jo Smith

Brandon Brink

April Franklin

10

Oct 25, 2016

"Zulu Iklwa"

Matthew Moline

Lyle Wynn

Scott Mcreynolds

Clarence Jackson

11

Jan 10, 2017

Champions Edition[note 1] – "The Pata"[1]

Travis Wuertz

Shayne Carter

Peter Swarz-Burt

Scott Thomas

12

Jan 17, 2017

"The Zweihänder"

Jay Replogle

Stephan Fowler

Harry Black

Emiliano Carrillo

13

Jan 24, 2017

"Cavalry Saber"

David Mooneyham

Todd Bitler

Jason Glenn Howell

Nic Hanlon

14

Jan 31, 2017

"The Naginata"

Theo Nazz

Joe Collett

Walter Sorrells

Erich Ouellette

15

Feb 7, 2017

"The Haladie"

Raymond Smith

Stephen Williamson

Jason Kraus

Adlai Stein

16

Feb 14, 2017

Redemption[note 3] – "Viking sword"

Gabriel Bell

Clarence Jackson

JD Smith

Brandon Brink

text: Season 4 (2017–18)[edit]

text:
Episode

Airdate

Title

Results

1st place

2nd place

3rd place

4th place

1

Apr 11, 2017

Judges' Pick[note 4] – "The Ida"

Mareko Maumasi

Josh Smith

David Goldberg

Erin Simmons

2

Apr 11, 2017

"Deer Horn Knives"

Nicholas Marcelja

Steve Godfrey

Dustin Rhodes

Thor Laizans

3

Apr 18, 2017

"The Katzbalger"

James Helm

Paul Walsh

Rashelle Hams

Jesse Hauer (medically disqualified)

4

Apr 25, 2017

"Makraka"

Craig Barr

Paul Brown

Brian Dimmock

Mark Nevling

5

May 2, 2017

Fan's Choice[note 2] – "The Panabas"

Josh Weston

Ray Kirk

Robby Bowman

Chad Osborne

6

May 9, 2017

"Akrafena"

Page Steinhardt

Brock Martin

Larry Clements

Terry Mitchell

7

May 16, 2017

"Talwar"

Jordan LaMothe

David McConnell

Rick Fenlon

Carl Oliver

8

May 23, 2017

"The Cinquedea"

Neil Kamimura

Dan Hurtado

Storm Richardson

Demetrios Papatriantafyllou

9

Jun 6, 2017

"The Charay"

Steve Grosvenor

Ryan Rowe

Mark Green

Tyler Mandgie

10

Jun 13, 2017

Redemption[note 3] – "Sword Breaker"

James Huse

Erich Ouellette

Earl Blackmore

Morgan Medlen

11

Jul 11, 2017

Master & Apprentice[note 5] – "Nzappa zap"

Frank Allen Wren IINehemiah Brousseau

Jesse RhodesZack Lewis

Robert TimberlakeWesley Alberson

Joseph SzilaskiJohn Lewis

12

Jul 18, 2017

"Ngombe (de) Ngulu (de)"

Steven Bryan

Paul Brach

Robert Putantsu

Ryan Weeks

13

Jul 25, 2017

"The Shamshir"

Andrew Taycach

Tim Shoal

Tom Kinder

Chad Hollar

14

Aug 1, 2017

"The Kachin Dao"

Shawn Ellis

Rachel Oliver

Buster Grubbs

Chad Bozeman (medically disqualified)

15

Aug 8, 2017

"The Gladiator Scissor"

Don Halter

Jason Henderson

Alf Rudd

Francesco Muci

16

Aug 22, 2017

"The Kampilan"

Michael Cross

Todd Martin

Jack Barber

Leland Edward Stone

17

Aug 29, 2017

"The Kpinga"

Nate Summers

Richard Epting

Jim Poor

John Rainey

18

Sep 12, 2017

"The Yatagan"

Gabe Mabry

Dave Catoe

Josh Fikentscher

Randall W Turner

19

Oct 3, 2017

International Championship – "The Spadroon"

JW Randall

Julien Maniglier

Guillermo Mendoza

Michal Sielicki

20

Oct 10, 2017

"The Tabar-Shishpar"

Mark Steele Knapp

Christopher Price

Holden Bystry

Dan Rotblatt

21

Oct 17, 2017

Ultimate Champions Edition[note 6] – "The T'ai Chi Sword"

Theo Nazz

Neil Kamimura

Kelly Vermeer-Vella

Nicholas Marcelja (Round 1)Raymond Smith (preliminary)

22

Oct 24, 2017

Knights Templar – "Crusader Sword"

David Mirabile

Brian Rognholt

Josh Fenlon

Richard Moore

23

Oct 31, 2017

Viking Edition – "Viking War Axes"

Jeremiah Backhaus

Chris Rowley

Jeff Renner

Joel Davis

text: Season 5 (2018–present)[edit]

text:
Episode

Airdate

Title

Results

1st place

2nd place

3rd place

4th place

1[7]

Mar 7, 2018

"The Rhomphaia"

Bill Sowell

Dwight Phillips

Mark Collard

Steve Culver

2

Mar 13, 2018

Rookies Edition[note 7]"The War Golok"

Brian Schmidt

Matt Wagner

Tyler Grant

Joey Lynn (Round 1)Steve Johnson (preliminary)

3

Mar 20, 2018

"The Schiavona"

Jeff Wagenaar

Brad McDougall

Brendan McHugh

Wes Whipple

4

Mar 27, 2018

"The Sica"

Tony Fetters

Frank Sausto

Corey Soper

Gage Mason

5

Apr 3, 2018

"The Jumonji yari"

Jacob Gayton

Fuad Accawi

Gary Sandstrom

Kyle Kilroy

6

Apr 10, 2018

"The Kabyle Flyssa"

Collin Sage

Daniel Casey

Bob Hastings

Jesse Adcock

7

Apr 17, 2018

Ultimate Team Challenge"The Chinese Dao"

Mark J. HopperJessica D. Collins

Joe CarltonCasey Perdue

Raleigh DesiatoKelly Gregory

Tyler AdkinsLeon Vanguard

8

Apr 24, 2018

"The Karabela"

Ethan Kempf

Liam Fuller

Ron Gramza

Evan Griffith

9

May 1, 2018

"The Zande Spear"

Drew Goodson

Jason Nass

Daniel James Reichow

Larry Metcalf

10

May 8, 2018

"The Navaja"

Matthew Christiano

Wade Seiders

Christoph Deringer

Brandon Austin

11

May 15, 2018

"The German Halberd"

Phillip Baldwin

Johnathan Sibley

Doran Doran

Ben Swapp

12

May 22, 2018

"The Two-Handed Sword"

Jonathan Allen

Ed Wilson

Andy Walker

Jordan Kataris

13

May 28, 2018

Military History Tribute"Naval Cutlass"

Jon Nagel

Mike Miller

Jim McGuinn

Perry Johnson (medically disqualified)

14

May 29, 2018

"Horseman's Axe"

J. Alex Ruiz

Mike Bailey

Andrew Woznak

Bill van Heteran

15

Jun 5, 2018

"Lion Spear"

John Grady Hippard

Matthew Berry

Aaron Morrison

JC Krusen

16

Jun 12, 2018

"Kelewang"

Tim Lough

Hunter Johnson

Alan Kirby

Edward Lacey

17

Jun 19, 2018

"Bagh Nakh"

Chad Hatfield

Josh Prince

Aaron Trosky

John Galso

18

Jun 26, 2018

"Glaive Guisarme"

Nick Santella

Alex Eisenberg

Brian Neville

Dwight Neely (medically disqualified)

19

Jul 3, 2018

"Pioneer Sword"

Mark Sperry

Nicholas Downing

Garrin Bucco

John Dickinson

20

Jul 17, 2018

"Wind and Fire Wheels"

Rebel Rodriguez

Chuck Cook

Tony Miller

Steve Lewis

21

Jul 24, 2018

"Smallsword"

Derek Melton

Bob Andrews

John Clark

Atsatsa Antonio

22

Jul 31, 2018

"Celtic Anthropomorphic Sword"

Bill Behnke

Chuck Fowler

Cole Coffer

Brett Onnink

23

Aug 7, 2018

"The Kilij"

Connor J. Myers-Norton

Brian Weaver

Curtis Haaland

Marc Setzer

24

Aug 14, 2018

"The Sawback Hunting Sword"

Trevor Rideout

Devin Cornell

Mike Camp

Gordon Knapp

25

Aug 21, 2018

"The Arming Sword"

John Stokes

Drew Hash

Duane Bennet

Quentin Horton

26

Aug 28, 2018

"The Senegese"

Ashe Cravenock

Levi Kring

Geoff Keyes

Jon Turner

text: Trivia[edit]

text: In the city of Cohoes, New York near Albany, a man, inspired by the series, tried to forge a piece of metal over a fire in a barrel near his home. He caused a fire that destroyed three residential buildings and damaged 28 others.[8]

text: Notes[edit]

text:
^ Jump up to: a b These four contestants, all champions from previous seasons, were invited to compete again. The winner received an additional $10,000 and the title "Champion of Champions"

^ Jump up to: a b These four contestants from previous seasons were invited to compete again based on fans' reaction to their initial performance.

^ Jump up to: a b This episode featured contestants eliminated from previous episodes returning for a chance at redemption

Jump up ^ These four contestants from previous seasons, each chosen by one of the four judges, were invited to compete again.

Jump up ^ Four master/apprentice pairs competed in this episode. When Jesse withdrew at the end of the first round, Zack was allowed to continue on his own.

Jump up ^ Five champions from previous episodes were invited to compete again. Raymond Smith was eliminated based on the results of a preliminary test performed on blades that they forged ahead of time.

Jump up ^ This episode followed the same structure as the Ultimate Champions Edition in Season 4, with five smiths who were inspired to take up the craft after watching the show.

tag: ol


document_title: ARM architecture

question_text: which is the first company who defined risc architecture

question_tokens: which is the first company who defined risc architecture

text: ARM architecture

text: History[edit]

text: The British computer manufacturer Acorn Computers first developed the Acorn RISC Machine architecture (ARM)[13][14] in the 1980s to use in its personal computers. Its first ARM-based products were coprocessor modules for the BBC Micro series of computers. After the successful BBC Micro computer, Acorn Computers considered how to move on from the relatively simple MOS Technology 6502 processor to address business markets like the one that was soon dominated by the IBM PC, launched in 1981. The Acorn Business Computer (ABC) plan required that a number of second processors be made to work with the BBC Micro platform, but processors such as the Motorola 68000 and National Semiconductor 32016 were considered unsuitable, and the 6502 was not powerful enough for a graphics-based user interface.[15]

text: According to Sophie Wilson, all the processors tested at that time performed about the same, with about a 4 Mbit/second bandwidth.[16]

text: After testing all available processors and finding them lacking, Acorn decided it needed a new architecture. Inspired by papers from the Berkeley RISC project, Acorn considered designing its own processor.[17] A visit to the Western Design Center in Phoenix, where the 6502 was being updated by what was effectively a single-person company, showed Acorn engineers Steve Furber and Sophie Wilson they did not need massive resources and state-of-the-art research and development facilities.[18]

text: Wilson developed the instruction set, writing a simulation of the processor in BBC BASIC that ran on a BBC Micro with a 6502 second processor. This convinced Acorn engineers they were on the right track. Wilson approached Acorn's CEO, Hermann Hauser, and requested more resources. Hauser gave his approval and assembled a small team to implement Wilson's model in hardware.

text: Acorn RISC Machine: ARM2[edit]

text: The official Acorn RISC Machine project started in October 1983. They chose VLSI Technology as the silicon partner, as they were a source of ROMs and custom chips for Acorn. Wilson and Furber led the design. They implemented it with a similar efficiency ethos as the 6502.[19] A key design goal was achieving low-latency input/output (interrupt) handling like the 6502. The 6502's memory access architecture had let developers produce fast machines without costly direct memory access (DMA) hardware.

text: The first samples of ARM silicon worked properly when first received and tested on 26 April 1985.[3]

text: The first ARM application was as a second processor for the BBC Micro, where it helped in developing simulation software to finish development of the support chips (VIDC, IOC, MEMC), and sped up the CAD software used in ARM2 development. Wilson subsequently rewrote BBC BASIC in ARM assembly language. The in-depth knowledge gained from designing the instruction set enabled the code to be very dense, making ARM BBC BASIC an extremely good test for any ARM emulator. The original aim of a principally ARM-based computer was achieved in 1987 with the release of the Acorn Archimedes.[20] In 1992, Acorn once more won the Queen's Award for Technology for the ARM.

text: The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers. Eight bits from the program counter register were available for other purposes; the top six bits (available because of the 26-bit address space) served as status flags, and the bottom two bits (available because the program counter was always word-aligned) were used for setting modes. The address bus was extended to 32 bits in the ARM6, but program code still had to lie within the first 64 MB of memory in 26-bit compatibility mode, due to the reserved bits for the status flags.[21] The ARM2 had a transistor count of just 30,000, compared to Motorola's six-year-older 68000 model with around 40,000.[22] Much of this simplicity came from the lack of microcode (which represents about one-quarter to one-third of the 68000) and from (like most CPUs of the day) not including any cache. This simplicity enabled low power consumption, yet better performance than the Intel 80286. A successor, ARM3, was produced with a 4 KB cache, which further improved performance.[23]

text: Collaboration: ARM6[edit]

text: In the late 1980s Apple Computer and VLSI Technology started working with Acorn on newer versions of the ARM core. In 1990, Acorn spun off the design team into a new company named Advanced RISC Machines Ltd.,[24][25][26] which became ARM Ltd when its parent company, ARM Holdings plc, floated on the London Stock Exchange and NASDAQ in 1998.[27] The new Apple-ARM work would eventually evolve into the ARM6, first released in early 1992. Apple used the ARM6-based ARM610 as the basis for their Apple Newton PDA.

text: Early licensees[edit]

text: In 1994, Acorn used the ARM610 as the main central processing unit (CPU) in their RiscPC computers. DEC licensed the ARMv4 architecture and produced the StrongARM.[28] At 233 MHz, this CPU drew only one watt (newer versions draw far less). This work was later passed to Intel as part of a lawsuit settlement, and Intel took the opportunity to supplement their i960 line with the StrongARM. Intel later developed its own high performance implementation named XScale, which it has since sold to Marvell. Transistor count of the ARM core remained essentially the same throughout these changes; ARM2 had 30,000 transistors,[29] while ARM6 grew only to 35,000.[30]

text: Market share[edit]

text: In 2005, about 98% of all mobile phones sold used at least one ARM processor.[31] In 2010, producers of chips based on ARM architectures reported shipments of 6.1 billion ARM-based processors, representing 95% of smartphones, 35% of digital televisions and set-top boxes and 10% of mobile computers. In 2011, the 32-bit ARM architecture was the most widely used architecture in mobile devices and the most popular 32-bit one in embedded systems.[32] In 2013, 10 billion were produced[33] and "ARM-based chips are found in nearly 60 percent of the world’s mobile devices".[34]

text: Licensing[edit]

text: Core licence[edit]

text: ARM Holdings' primary business is selling IP cores, which licensees use to create microcontrollers (MCUs), CPUs, and systems-on-chips based on those cores. The original design manufacturer combines the ARM core with other parts to produce a complete device, typically one that can be built in existing Semiconductor fabrication plants (fabs) at low cost and still deliver substantial performance. The most successful implementation has been the ARM7TDMI with hundreds of millions sold. Atmel has been a precursor design center in the ARM7TDMI-based embedded system.

text: The ARM architectures used in smartphones, PDAs and other mobile devices range from ARMv5 to ARMv7-A, used in low-end and midrange devices, to ARMv8-A used in current high-end devices.

text: In 2009, some manufacturers introduced netbooks based on ARM architecture CPUs, in direct competition with netbooks based on Intel Atom.[35] According to analyst firm IHS iSuppli, by 2015, ARM Integrated circuits may be in 23% of all laptops.[36]

text: ARM Holdings offers a variety of licensing terms, varying in cost and deliverables. ARM Holdings provides to all licensees an integratable hardware description of the ARM core as well as complete software development toolset (compiler, debugger, software development kit) and the right to sell manufactured silicon containing the ARM CPU.

text: SoC packages integrating ARM's core designs include Nvidia Tegra's first three generations, CSR plc's Quatro family, ST-Ericsson's Nova and NovaThor, Silicon Labs's Precision32 MCU, Texas Instruments's OMAP products, Samsung's Hummingbird and Exynos products, Apple's A4, A5, and A5X, and Freescale's i.MX.

text: Fabless licensees, who wish to integrate an ARM core into their own chip design, are usually only interested in acquiring a ready-to-manufacture verified semiconductor intellectual property core. For these customers, ARM Holdings delivers a gate netlist description of the chosen ARM core, along with an abstracted simulation model and test programs to aid design integration and verification. More ambitious customers, including integrated device manufacturers (IDM) and foundry operators, choose to acquire the processor IP in synthesizable RTL (Verilog) form. With the synthesizable RTL, the customer has the ability to perform architectural level optimisations and extensions. This allows the designer to achieve exotic design goals not otherwise possible with an unmodified netlist (high clock speed, very low power consumption, instruction set extensions, etc.). While ARM Holdings does not grant the licensee the right to resell the ARM architecture itself, licensees may freely sell manufactured product such as chip devices, evaluation boards and complete systems. Merchant foundries can be a special case; not only are they allowed to sell finished silicon containing ARM cores, they generally hold the right to re-manufacture ARM cores for other customers.

text: ARM Holdings prices its IP based on perceived value. Lower performing ARM cores typically have lower licence costs than higher performing cores. In implementation terms, a synthesizable core costs more than a hard macro (blackbox) core. Complicating price matters, a merchant foundry that holds an ARM licence, such as Samsung or Fujitsu, can offer fab customers reduced licensing costs. In exchange for acquiring the ARM core through the foundry's in-house design services, the customer can reduce or eliminate payment of ARM's upfront licence fee.

text: Compared to dedicated semiconductor foundries (such as TSMC and UMC) without in-house design services, Fujitsu/Samsung charge two- to three-times more per manufactured wafer.[citation needed] For low to mid volume applications, a design service foundry offers lower overall pricing (through subsidisation of the licence fee). For high volume mass-produced parts, the long term cost reduction achievable through lower wafer pricing reduces the impact of ARM's NRE (Non-Recurring Engineering) costs, making the dedicated foundry a better choice.

text: Companies that have designed chips with ARM cores include Amazon.com's Annapurna Labs subsidiary,[37] Analog Devices, Apple, AppliedMicro (now: MACOM Technology Solutions[38]), Atmel, Broadcom, Cypress Semiconductor, Freescale Semiconductor (now NXP Semiconductors), Nvidia, NXP, Qualcomm, Renesas, Samsung Electronics, ST Microelectronics and Texas Instruments.

text: Architectural licence[edit]

text: Companies can also obtain an ARM architectural licence for designing their own CPU cores using the ARM instruction sets. These cores must comply fully with the ARM architecture. Companies that have designed cores that implement an ARM architecture include Apple, AppliedMicro, Broadcom, Cavium (now: Marvell), Nvidia, Qualcomm, and Samsung Electronics.

text: Cores[edit]

text:
Architecture
Core bit-width
Cores
Profile
References

ARM Holdings
Third-party

ARMv1

32[a 1]

ARM1

ARMv2

32[a 1]

ARM2, ARM250, ARM3
Amber, STORM Open Soft Core[39]

ARMv3

32[a 2]

ARM6, ARM7

ARMv4

32[a 2]

ARM8
StrongARM, FA526, ZAP Open Source Processor Core[40]

ARMv4T

32[a 2]

ARM7TDMI, ARM9TDMI, SecurCore SC100

ARMv5TE

32

ARM7EJ, ARM9E, ARM10E
XScale, FA626TE, Feroceon, PJ1/Mohawk

ARMv6

32

ARM11

ARMv6-M

32

ARM Cortex-M0, ARM Cortex-M0+, ARM Cortex-M1, SecurCore SC000

Microcontroller

ARMv7-M

32

ARM Cortex-M3, SecurCore SC300

Microcontroller

ARMv7E-M

32

ARM Cortex-M4, ARM Cortex-M7

Microcontroller

ARMv8-M

32

ARM Cortex-M23,[41] ARM Cortex-M33[42]

Microcontroller

[43]

ARMv7-R

32

ARM Cortex-R4, ARM Cortex-R5, ARM Cortex-R7, ARM Cortex-R8

Real-time

ARMv8-R

32

ARM Cortex-R52

Real-time

[44][45][46]

ARMv7-A

32

ARM Cortex-A5, ARM Cortex-A7, ARM Cortex-A8, ARM Cortex-A9, ARM Cortex-A12, ARM Cortex-A15, ARM Cortex-A17
Qualcomm Krait, Scorpion, PJ4/Sheeva, Apple Swift

Application

ARMv8-A

32

ARM Cortex-A32

Application

ARMv8-A

64/32

ARM Cortex-A35,[47] ARM Cortex-A53, ARM Cortex-A57,[48] ARM Cortex-A72,[49] ARM Cortex-A73[50]
X-Gene, Nvidia Project Denver, AMD K12, Apple Cyclone/Typhoon/Twister/Hurricane/Zephyr, Cavium Thunder X,[51][52][53] Qualcomm Kryo, Samsung M1 and M2 ("Mongoose")[54]

Application

[55][56]

ARMv8.1-A

64/32

TBA

Application

ARMv8.2-A

64/32

ARM Cortex-A55,[57] ARM Cortex-A75,[58]

Application

ARMv8.3-A

64/32

TBA

Application

tag: table

text:
^ Jump up to: a b Although most datapaths and CPU registers in the early ARM processors were 32-bit, addressable memory was limited to 26 bits; with upper bits, then, used for status flags in the program counter register.
^ Jump up to: a b c ARMv3 included a compatibility mode to support the 26-bit addresses of earlier versions of the architecture. This compatibility mode optional in ARMv4, and removed entirely in ARMv5.

text: ARM Holdings provides a list of vendors who implement ARM cores in their design (application specific standard products (ASSP), microprocessor and microcontrollers).[59]

text: Example applications of ARM cores[edit]

text: ARM cores are used in a number of products, particularly PDAs and smartphones. Some computing examples are Microsoft's first generation Surface and Surface 2, Apple's iPads and Asus's Eee Pad Transformer tablet computers, and several Chromebook laptops. Others include Apple's iPhone smartphone and iPod portable media player, Canon PowerShot digital cameras, Nintendo Switch hybrid and 3DS handheld game consoles, and TomTom turn-by-turn navigation systems.

text: In 2005, ARM Holdings took part in the development of Manchester University's computer SpiNNaker, which used ARM cores to simulate the human brain.[60]

text: ARM chips are also used in Raspberry Pi, BeagleBoard, BeagleBone, PandaBoard and other single-board computers, because they are very small, inexpensive and consume very little power.

text: 32-bit architecture[edit]

text: The 32-bit ARM architecture, such as ARMv7-A, was the most widely used architecture in mobile devices as of 2011[update].[32]

text: Since 1995, the ARM Architecture Reference Manual[61] has been the primary source of documentation on the ARM processor architecture and instruction set, distinguishing interfaces that all ARM processors are required to support (such as instruction semantics) from implementation details that may vary. The architecture has evolved over time, and version seven of the architecture, ARMv7, defines three architecture "profiles":

text:
A-profile, the "Application" profile, implemented by 32-bit cores in the Cortex-A series and by some non-ARM cores
R-profile, the "Real-time" profile, implemented by cores in the Cortex-R series
M-profile, the "Microcontroller" profile, implemented by most cores in the Cortex-M series

tag: ul

text: Although the architecture profiles were first defined for ARMv7, ARM subsequently defined the ARMv6-M architecture (used by the Cortex M0/M0+/M1) as a subset of the ARMv7-M profile with fewer instructions.

text: CPU modes[edit]

text: Except in the M-profile, the 32-bit ARM architecture specifies several CPU modes, depending on the implemented architecture features. At any moment in time, the CPU can be in only one mode, but it can switch modes due to external events (interrupts) or programmatically.[62]

text:
User mode: The only non-privileged mode.
FIQ mode: A privileged mode that is entered whenever the processor accepts a fast interrupt request.
IRQ mode: A privileged mode that is entered whenever the processor accepts an interrupt.
Supervisor (svc) mode: A privileged mode entered whenever the CPU is reset or when an SVC instruction is executed.
Abort mode: A privileged mode that is entered whenever a prefetch abort or data abort exception occurs.
Undefined mode: A privileged mode that is entered whenever an undefined instruction exception occurs.
System mode (ARMv4 and above): The only privileged mode that is not entered by an exception. It can only be entered by executing an instruction that explicitly writes to the mode bits of the Current Program Status Register (CPSR).
Monitor mode (ARMv6 and ARMv7 Security Extensions, ARMv8 EL3): A monitor mode is introduced to support TrustZone extension in ARM cores.
Hyp mode (ARMv7 Virtualization Extensions, ARMv8 EL2): A hypervisor mode that supports Popek and Goldberg virtualization requirements for the non-secure operation of the CPU.[63][64]
Thread mode (ARMv6-M, ARMv7-M, ARMv8-M): A mode which can be specified as either privileged or unprivileged, while whether Main Stack Pointer (MSP) or Process Stack Pointer (PSP) is used can also be specified in CONTROL register with privileged access. This mode is designed for user tasks in RTOS environment but it's typically used in bare-metal for super-loop.
Handler mode (ARMv6-M, ARMv7-M, ARMv8-M): A mode dedicated for exception handling (except the RESET which are handled in Thread mode). Handler mode always uses MSP and works in privileged level.

text: Instruction set[edit]

text: The original (and subsequent) ARM implementation was hardwired without microcode, like the much simpler 8-bit 6502 processor used in prior Acorn microcomputers.

text: The 32-bit ARM architecture (and the 64-bit architecture for the most part) includes the following RISC features:

text:
Load/store architecture.
No support for unaligned memory accesses in the original version of the architecture. ARMv6 and later, except some microcontroller versions, support unaligned accesses for half-word and single-word load/store instructions with some limitations, such as no guaranteed atomicity.[65][66]
Uniform 16× 32-bit register file (including the program counter, stack pointer and the link register).
Fixed instruction width of 32 bits to ease decoding and pipelining, at the cost of decreased code density. Later, the Thumb instruction set added 16-bit instructions and increased code density.
Mostly single clock-cycle execution.

text: To compensate for the simpler design, compared with processors like the Intel 80286 and Motorola 68020, some additional design features were used:

text:
Conditional execution of most instructions reduces branch overhead and compensates for the lack of a branch predictor.
Arithmetic instructions alter condition codes only when desired.
32-bit barrel shifter can be used without performance penalty with most arithmetic instructions and address calculations.
Has powerful indexed addressing modes.
A link register supports fast leaf function calls.
A simple, but fast, 2-priority-level interrupt subsystem has switched register banks.

text: Arithmetic instructions[edit]

text: ARM includes integer arithmetic operations for add, subtract, and multiply; some versions of the architecture also support divide operations.

text: ARM supports 32-bit × 32-bit multiplies with either a 32-bit result or 64-bit result, though Cortex-M0 / M0+ / M1 cores don't support 64-bit results.[67] Some ARM cores also support 16-bit × 16-bit and 32-bit × 16-bit multiplies.

text: The divide instructions are only included in the following ARM architectures:

text:
ARMv7-M and ARMv7E-M architectures always include divide instructions.[68]
ARMv7-R architecture always includes divide instructions in the Thumb instruction set, but optionally in its 32-bit instruction set.[69]
ARMv7-A architecture optionally includes the divide instructions. The instructions might not be implemented, or implemented only in the Thumb instruction set, or implemented in both the Thumb and ARM instruction sets, or implemented if the Virtualization Extensions are included.[69]

text: Registers[edit]

text:
Registers across CPU modes

usr
sys
svc
abt
und
irq
fiq

R0

R1

R2

R3

R4

R5

R6

R7

R8
R8_fiq

R9
R9_fiq

R10
R10_fiq

R11
R11_fiq

R12
R12_fiq

R13
R13_svc
R13_abt
R13_und
R13_irq
R13_fiq

R14
R14_svc
R14_abt
R14_und
R14_irq
R14_fiq

R15

CPSR

SPSR_svc
SPSR_abt
SPSR_und
SPSR_irq
SPSR_fiq

text: Registers R0 through R7 are the same across all CPU modes; they are never banked.

text: Registers R8 through R12 are the same across all CPU modes except FIQ mode. FIQ mode has its own distinct R8 through R12 registers.

text: R13 and R14 are banked across all privileged CPU modes except system mode. That is, each mode that can be entered because of an exception has its own R13 and R14. These registers generally contain the stack pointer and the return address from function calls, respectively.

text: Aliases:

text:
R13 is also referred to as SP, the Stack Pointer.
R14 is also referred to as LR, the Link Register.
R15 is also referred to as PC, the Program Counter.

text: The Current Program Status Register (CPSR) has the following 32 bits.[70]

text:
M (bits 0–4) is the processor mode bits.
T (bit 5) is the Thumb state bit.
F (bit 6) is the FIQ disable bit.
I (bit 7) is the IRQ disable bit.
A (bit 8) is the imprecise data abort disable bit.
E (bit 9) is the data endianness bit.
IT (bits 10–15 and 25–26) is the if-then state bits.
GE (bits 16–19) is the greater-than-or-equal-to bits.
DNM (bits 20–23) is the do not modify bits.
J (bit 24) is the Java state bit.
Q (bit 27) is the sticky overflow bit.
V (bit 28) is the overflow bit.
C (bit 29) is the carry/borrow/extend bit.
Z (bit 30) is the zero bit.
N (bit 31) is the negative/less than bit.

text: Conditional execution[edit]

text: Almost every ARM instruction has a conditional execution feature called predication, which is implemented with a 4-bit condition code selector (the predicate). To allow for unconditional execution, one of the four-bit codes causes the instruction to be always executed. Most other CPU architectures only have condition codes on branch instructions.

text: Though the predicate takes up four of the 32 bits in an instruction code, and thus cuts down significantly on the encoding bits available for displacements in memory access instructions, it avoids branch instructions when generating code for small if statements. Apart from eliminating the branch instructions themselves, this preserves the fetch/decode/execute pipeline at the cost of only one cycle per skipped instruction.

text: The standard example of conditional execution is the subtraction-based Euclidean algorithm:

text: In the C programming language, the loop is:

text: For ARM assembly, the loop can be effectively transformed into:

text: and coded as:

text: which avoids the branches around the then and else clauses. If Ri and Rj are equal then neither of the SUB instructions will be executed, eliminating the need for a conditional branch to implement the while check at the top of the loop, for example had SUBLE (less than or equal) been used.

text: One of the ways that Thumb code provides a more dense encoding is to remove the four bit selector from non-branch instructions.

text: Other features[edit]

text: Another feature of the instruction set is the ability to fold shifts and rotates into the "data processing" (arithmetic, logical, and register-register move) instructions, so that, for example, the C statement

text: could be rendered as a single-word, single-cycle instruction:[71]

text: This results in the typical ARM program being denser than expected with fewer memory accesses; thus the pipeline is used more efficiently.

text: The ARM processor also has features rarely seen in other RISC architectures, such as PC-relative addressing (indeed, on the 32-bit[1] ARM the PC is one of its 16 registers) and pre- and post-increment addressing modes.

text: The ARM instruction set has increased over time. Some early ARM processors (before ARM7TDMI), for example, have no instruction to store a two-byte quantity.

text: Pipelines and other implementation issues[edit]

text: The ARM7 and earlier implementations have a three-stage pipeline; the stages being fetch, decode and execute. Higher-performance designs, such as the ARM9, have deeper pipelines: Cortex-A8 has thirteen stages. Additional implementation changes for higher performance include a faster adder and more extensive branch prediction logic. The difference between the ARM7DI and ARM7DMI cores, for example, was an improved multiplier; hence the added "M".

text: Coprocessors[edit]

text: The ARM architecture (pre-ARMv8) provides a non-intrusive way of extending the instruction set using "coprocessors" that can be addressed using MCR, MRC, MRRC, MCRR and similar instructions. The coprocessor space is divided logically into 16 coprocessors with numbers from 0 to 15, coprocessor 15 (cp15) being reserved for some typical control functions like managing the caches and MMU operation on processors that have one.

text: In ARM-based machines, peripheral devices are usually attached to the processor by mapping their physical registers into ARM memory space, into the coprocessor space, or by connecting to another device (a bus) that in turn attaches to the processor. Coprocessor accesses have lower latency, so some peripherals—for example, an XScale interrupt controller—are accessible in both ways: through memory and through coprocessors.

text: In other cases, chip designers only integrate hardware using the coprocessor mechanism. For example, an image processing engine might be a small ARM7TDMI core combined with a coprocessor that has specialised operations to support a specific set of HDTV transcoding primitives.

text: Debugging[edit]

text: This section needs additional citations for verification. Please help improve this article by adding citations to reliable sources. Unsourced material may be challenged and removed. (March 2011) (Learn how and when to remove this template message)

text: All modern ARM processors include hardware debugging facilities, allowing software debuggers to perform operations such as halting, stepping, and breakpointing of code starting from reset. These facilities are built using JTAG support, though some newer cores optionally support ARM's own two-wire "SWD" protocol. In ARM7TDMI cores, the "D" represented JTAG debug support, and the "I" represented presence of an "EmbeddedICE" debug module. For ARM7 and ARM9 core generations, EmbeddedICE over JTAG was a de facto debug standard, though not architecturally guaranteed.

text: The ARMv7 architecture defines basic debug facilities at an architectural level. These include breakpoints, watchpoints and instruction execution in a "Debug Mode"; similar facilities were also available with EmbeddedICE. Both "halt mode" and "monitor" mode debugging are supported. The actual transport mechanism used to access the debug facilities is not architecturally specified, but implementations generally include JTAG support.

text: There is a separate ARM "CoreSight" debug architecture, which is not architecturally required by ARMv7 processors.

text: DSP enhancement instructions[edit]

text: To improve the ARM architecture for digital signal processing and multimedia applications, DSP instructions were added to the set.[72] These are signified by an "E" in the name of the ARMv5TE and ARMv5TEJ architectures. E-variants also imply T, D, M, and I.

text: The new instructions are common in digital signal processor (DSP) architectures. They include variations on signed multiply–accumulate, saturated add and subtract, and count leading zeros.

text: SIMD extensions for multimedia[edit]

text: Introduced in the ARMv6 architecture, this was a precursor to Advanced SIMD, also known as NEON.[73]

text: Jazelle[edit]

text: Jazelle DBX (Direct Bytecode eXecution) is a technique that allows Java Bytecode to be executed directly in the ARM architecture as a third execution state (and instruction set) alongside the existing ARM and Thumb-mode. Support for this state is signified by the "J" in the ARMv5TEJ architecture, and in ARM9EJ-S and ARM7EJ-S core names. Support for this state is required starting in ARMv6 (except for the ARMv7-M profile), though newer cores only include a trivial implementation that provides no hardware acceleration.

text: Thumb[edit]

text: To improve compiled code-density, processors since the ARM7TDMI (released in 1994[74]) have featured the Thumb instruction set, which have their own state. (The "T" in "TDMI" indicates the Thumb feature.) When in this state, the processor executes the Thumb instruction set, a compact 16-bit encoding for a subset of the ARM instruction set.[75] Most of the Thumb instructions are directly mapped to normal ARM instructions. The space-saving comes from making some of the instruction operands implicit and limiting the number of possibilities compared to the ARM instructions executed in the ARM instruction set state.

text: In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general-purpose registers. The shorter opcodes give improved code density overall, even though some operations require extra instructions. In situations where the memory port or bus width is constrained to less than 32 bits, the shorter Thumb opcodes allow increased performance compared with 32-bit ARM code, as less program code may need to be loaded into the processor over the constrained memory bandwidth.

text: Embedded hardware, such as the Game Boy Advance, typically have a small amount of RAM accessible with a full 32-bit datapath; the majority is accessed via a 16-bit or narrower secondary datapath. In this situation, it usually makes sense to compile Thumb code and hand-optimise a few of the most CPU-intensive sections using full 32-bit ARM instructions, placing these wider instructions into the 32-bit bus accessible memory.

text: The first processor with a Thumb instruction decoder was the ARM7TDMI. All ARM9 and later families, including XScale, have included a Thumb instruction decoder.[76] The Thumb instruction set was originally inspired by SuperH's ISA; ARM licensed several patents from Hitachi.[76]

text: Thumb-2 technology was introduced in the ARM1156 core, announced in 2003. Thumb-2 extends the limited 16-bit instruction set of Thumb with additional 32-bit instructions to give the instruction set more breadth, thus producing a variable-length instruction set. A stated aim for Thumb-2 was to achieve code density similar to Thumb with performance similar to the ARM instruction set on 32-bit memory.

text: Thumb-2 extends the Thumb instruction set with bit-field manipulation, table branches and conditional execution. At the same time, the ARM instruction set was extended to maintain equivalent functionality in both instruction sets. A new "Unified Assembly Language" (UAL) supports generation of either Thumb or ARM instructions from the same source code; versions of Thumb seen on ARMv7 processors are essentially as capable as ARM code (including the ability to write interrupt handlers). This requires a bit of care, and use of a new "IT" (if-then) instruction, which permits up to four successive instructions to execute based on a tested condition, or on its inverse. When compiling into ARM code, this is ignored, but when compiling into Thumb it generates an actual instruction. For example:

text: All ARMv7 chips support the Thumb instruction set. All chips in the Cortex-A series, Cortex-R series, and ARM11 series support both "ARM instruction set state" and "Thumb instruction set state", while chips in the Cortex-M series support only the Thumb instruction set.[77][78][79]

text: Thumb Execution Environment (ThumbEE)[edit]

text: ThumbEE (erroneously called Thumb-2EE in some ARM documentation), marketed as Jazelle RCT (Runtime Compilation Target), was announced in 2005, first appearing in the Cortex-A8 processor. ThumbEE is a fourth instruction set state, making small changes to the Thumb-2 extended instruction set. These changes make the instruction set particularly suited to code generated at runtime (e.g. by JIT compilation) in managed Execution Environments. ThumbEE is a target for languages such as Java, C#, Perl, and Python, and allows JIT compilers to output smaller compiled code without impacting performance.

text: New features provided by ThumbEE include automatic null pointer checks on every load and store instruction, an instruction to perform an array bounds check, and special instructions that call a handler. In addition, because it utilises Thumb-2 technology, ThumbEE provides access to registers r8-r15 (where the Jazelle/DBX Java VM state is held).[80] Handlers are small sections of frequently called code, commonly used to implement high level languages, such as allocating memory for a new object. These changes come from repurposing a handful of opcodes, and knowing the core is in the new ThumbEE state.

text: On 23 November 2011, ARM Holdings deprecated any use of the ThumbEE instruction set,[81] and ARMv8 removes support for ThumbEE.

text: Floating-point (VFP)[edit]

text: VFP (Vector Floating Point) technology is an FPU (Floating-Point Unit) coprocessor extension to the ARM architecture[82] (implemented differently in ARMv8 - coprocessors not defined there). It provides low-cost single-precision and double-precision floating-point computation fully compliant with the ANSI/IEEE Std 754-1985 Standard for Binary Floating-Point Arithmetic. VFP provides floating-point computation suitable for a wide spectrum of applications such as PDAs, smartphones, voice compression and decompression, three-dimensional graphics and digital audio, printers, set-top boxes, and automotive applications. The VFP architecture was intended to support execution of short "vector mode" instructions but these operated on each vector element sequentially and thus did not offer the performance of true single instruction, multiple data (SIMD) vector parallelism. This vector mode was therefore removed shortly after its introduction,[83] to be replaced with the much more powerful NEON Advanced SIMD unit.

text: Some devices such as the ARM Cortex-A8 have a cut-down VFPLite module instead of a full VFP module, and require roughly ten times more clock cycles per float operation.[84] Pre-ARMv8 architecture implemented floating-point/SIMD with the coprocessor interface. Other floating-point and/or SIMD units found in ARM-based processors using the coprocessor interface include FPA, FPE, iwMMXt, some of which were implemented in software by trapping but could have been implemented in hardware. They provide some of the same functionality as VFP but are not opcode-compatible with it.

text: In Debian GNU/Linux, and derivatives such as Ubuntu, armhf (ARM hard float) refers to the ARMv7 architecture including the additional VFP3-D16 floating-point hardware extension (and Thumb-2) above. Software packages and cross-compiler tools use the armhf vs. arm/armel suffixes to differentiate.[86]

text: Advanced SIMD (NEON)[edit]

text: The Advanced SIMD extension (aka NEON or "MPE" Media Processing Engine) is a combined 64- and 128-bit SIMD instruction set that provides standardized acceleration for media and signal processing applications. NEON is included in all Cortex-A8 devices, but is optional in Cortex-A9 devices.[87] NEON can execute MP3 audio decoding on CPUs running at 10 MHz, and can run the GSM adaptive multi-rate (AMR) speech codec at 13 MHz. It features a comprehensive instruction set, separate register files, and independent execution hardware.[88] NEON supports 8-, 16-, 32-, and 64-bit integer and single-precision (32-bit) floating-point data and SIMD operations for handling audio and video processing as well as graphics and gaming processing. In NEON, the SIMD supports up to 16 operations at the same time. The NEON hardware shares the same floating-point registers as used in VFP. Devices such as the ARM Cortex-A8 and Cortex-A9 support 128-bit vectors, but will execute with 64 bits at a time,[84] whereas newer Cortex-A15 devices can execute 128 bits at a time.

text: ProjectNe10 is ARM's first open-source project (from its inception). The Ne10 library is a set of common, useful functions written in both NEON and C (for compatibility). The library was created to allow developers to use NEON optimisations without learning NEON, but it also serves as a set of highly optimised NEON intrinsic and assembly code examples for common DSP, arithmetic, and image processing routines. The source code is available on GitHub[89]

text: Security extensions[edit]

text: TrustZone (for Cortex-A profile)[edit]

text: The Security Extensions, marketed as TrustZone Technology, is in ARMv6KZ and later application profile architectures. It provides a low-cost alternative to adding another dedicated security core to an SoC, by providing two virtual processors backed by hardware based access control. This lets the application core switch between two states, referred to as worlds (to reduce confusion with other names for capability domains), in order to prevent information from leaking from the more trusted world to the less trusted world. This world switch is generally orthogonal to all other capabilities of the processor, thus each world can operate independently of the other while using the same core. Memory and peripherals are then made aware of the operating world of the core and may use this to provide access control to secrets and code on the device.[90]

text: Typically, a rich operating system is run in the less trusted world, with smaller security-specialized code in the more trusted world, aiming to reduce the attack surface. Typical applications include DRM functionality for controlling the use of media on ARM-based devices,[91] and preventing any unapproved use of the device.

text: One option for the more trusted world is TrustZone Software, a TrustZone optimized version of the Trusted Foundations Software developed by Trusted Logic Mobility. Trusted Foundations Software was acquired by Gemalto. Giesecke & Devrient developed a rival implementation named Mobicore. In April 2012 ARM, Gemalto and Giesecke & Devrient combined their TrustZone portfolios into a joint venture Trustonic.[92][93]

text: In practice, since the specific implementation details of proprietary TrustZone implementations have not been publicly disclosed for review, it is unclear what level of assurance is provided for a given threat model, but they are not immune from attack.[94][95]

text: Open Virtualization[96] and T6[97] are open source implementations of the trusted world architecture for TrustZone.

text: AMD has licensed and incorporated TrustZone technology into its Secure Processor Technology.[98] Enabled in some but not all products, AMD's APUs include a Cortex-A5 processor for handling secure processing.[99][100][101] In fact, the Cortex-A5 TrustZone core had been included in earlier AMD products, but was not enabled due to time constraints.[100]

text: Samsung Knox uses TrustZone for purposes such as detecting modifications to the kernel.[102]

text: TrustZone for ARMv8-M (for Cortex-M profile)[edit]

text: The Security Extension, marketed as TrustZone for ARMv8-M Technology, was introduced in the ARMv8-M architecture.

text: No-execute page protection[edit]

text: As of ARMv6, the ARM architecture supports no-execute page protection, which is referred to as XN, for eXecute Never.[103]

text: Large Physical Address Extension (LPAE)[edit]

text: The Large Physical Address Extension (LPAE), which extends the physical address size from 32 bits to 40 bits, was added to the ARMv7-A architecture in 2011.[104]

text: ARMv8-R and ARMv8-M[edit]

text: The ARMv8-R and ARMv8-M sub-architectures, announced after the ARMv8-A sub-architecture, share some features with ARMv8-A, but don't include any 64-bit AArch64 instructions.

text: 64/32-bit architecture[edit]

text: Announced in October 2011,[7] ARMv8-A (often called ARMv8 while the ARMv8-R is also available) represents a fundamental change to the ARM architecture. It adds an optional 64-bit architecture (e.g. Cortex-A32 is a 32-bit ARMv8-A CPU[105] while most ARMv8-A CPUs support 64-bit, unlike all ARMv8-R), named "AArch64", and the associated new "A64" instruction set. AArch64 provides user-space compatibility with ARMv7-A, the 32-bit architecture, therein referred to as "AArch32" and the old 32-bit instruction set, now named "A32". The Thumb instruction sets are referred to as "T32" and have no 64-bit counterpart. ARMv8-A allows 32-bit applications to be executed in a 64-bit OS, and a 32-bit OS to be under the control of a 64-bit hypervisor.[1] ARM announced their Cortex-A53 and Cortex-A57 cores on 30 October 2012.[48] Apple was the first to release an ARMv8-A compatible core (Apple A7) in a consumer product (iPhone 5S). AppliedMicro, using an FPGA, was the first to demo ARMv8-A.[106] The first ARMv8-A SoC from Samsung is the Exynos 5433 used in the Galaxy Note 4, which features two clusters of four Cortex-A57 and Cortex-A53 cores in a big.LITTLE configuration; but it will run only in AArch32 mode.[107]

text: To both AArch32 and AArch64, ARMv8-A makes VFPv3/v4 and advanced SIMD (NEON) standard. It also adds cryptography instructions supporting AES, SHA-1/SHA-256 and finite field arithmetic.[108]

text: AArch64 features[edit]

text:
New instruction set, A64

Has 31 general-purpose 64-bit registers.
Has dedicated zero or stack pointer (SP) register (depending on instruction).
The program counter (PC) is no longer directly accessible as a register.
Instructions are still 32 bits long and mostly the same as A32 (with LDM/STM instructions and most conditional execution dropped).

Has paired loads/stores (in place of LDM/STM).
No predication for most instructions (except branches).

Most instructions can take 32-bit or 64-bit arguments.
Addresses assumed to be 64-bit.

Advanced SIMD (NEON) enhanced

Has 32× 128-bit registers (up from 16), also accessible via VFPv4.
Supports double-precision floating point.
Fully IEEE 754 compliant.
AES encrypt/decrypt and SHA-1/SHA-2 hashing instructions also use these registers.

A new exception system

Fewer banked registers and modes.

Memory translation from 48-bit virtual addresses based on the existing Large Physical Address Extension (LPAE), which was designed to be easily extended to 64-bit.

text: AArch64 was introduced in ARMv8-A and is included in subsequent versions of ARMV8-A. AArch64 is not included in ARMv8-R or ARMv8-M, because they are both 32-bit architectures.

text: In December 2014, ARMv8.1-A,[109] an update with "incremental benefits over v8.0", was announced. The enhancements fell into two categories: changes to the instruction set, and changes to the exception model and memory translation.

text: Instruction set enhancements included the following:

text:
A set of AArch64 atomic read-write instructions.
Additions to the Advanced SIMD instruction set for both AArch32 and AArch64 to enable opportunities for some library optimizations:

Signed Saturating Rounding Doubling Multiply Accumulate, Returning High Half.
Signed Saturating Rounding Doubling Multiply Subtract, Returning High Half.
The instructions are added in vector and scalar forms.

A set of AArch64 load and store instructions that can provide memory access order that is limited to configurable address regions.
The optional CRC instructions in v8.0 become a requirement in ARMv8.1.

text: Enhancements for the exception model and memory translation system included the following:

text:
A new Privileged Access Never (PAN) state bit provides control that prevents privileged access to user data unless explicitly enabled.
An increased VMID range for virtualization; supports a larger number of virtual machines.
Optional support for hardware update of the page table access flag, and the standardization of an optional, hardware updated, dirty bit mechanism.
The Virtualization Host Extensions (VHE). These enhancements improve the performance of Type 2 hypervisors by reducing the software overhead associated when transitioning between the Host and Guest operating systems. The extensions allow the Host OS to execute at EL2, as opposed to EL1, without substantial modification.
A mechanism to free up some translation table bits for operating system use, where the hardware support is not needed by the OS.

text: In January 2016, ARMv8.2-A was announced.[110] Its enhancements fell into four categories:

text:
Optional half-precision floating-point data processing (half-precision was already supported, but not for processing, just as a storage format.)
Memory model enhancements
Introduction of reliability, availability and serviceability (RAS) features
Introduction of statistical profiling

text: In 2016, ARMv8.3-A was announced. Its enhancements fell into six categories:[111]

text:
Pointer authentication[112] (AArch64 only); mandatory extension (based on a new block cipher, QARMA[113]) to the architecture (compilers need to exploit the security feature, but as the instructions are in NOP space, they are backwards compatible albeit providing no extra security on older chips).
Nested virtualization (AArch64 only)
Advanced SIMD complex number support (AArch64 and AArch32); e.g. rotations in by multiples of 90 degrees.
Improved JavaScript data type conversion support (AArch64 and AArch32); meaning next instruction can branch depending on if conversion to integer was exact (then a flag was set ).
A change to the memory consistency model (AArch64 only); to support the (non-default) weaker RCpc (Release Consistent processor consistent) model of C++11/C11 (the default C++11/C11 consistency model was already supported in previous ARMv8).
ID mechanism support for larger system-visible caches (AArch64 and AArch32)

text: ARMv8.3-A architecture is now supported by (at least) the GCC 7 compiler.[114]

text: In 2018, ARMv8.4-A is the latest revision. It adds e.g. "SHA3 / SHA512 / SM3 / SM4 crypto extensions", Memory Partitioning and Monitoring (MPAM) capabilities and a new Secure EL2 state.[115]

text: Operating system support[edit]

text: 32-bit operating systems[edit]

text:
Android
ChibiOS/RT
Deos
DRYOS
eCos
embOS
FreeRTOS
Integrity
Linux
MicroC/OS-II
MQX
Nucleus PLUS
NuttX
OSE
OS-9[116]
Plan 9
PikeOS[117]
QNX
RIOT
RTEMS
RTXC Quadros
SCIOPTA,[118]
ThreadX
TizenRT
T-Kernel
VxWorks
Windows Embedded Compact
Windows 10 IoT Core

text:
Android
Bada
BlackBerry OS/BlackBerry 10
Chrome OS
Firefox OS
MeeGo
Sailfish
Symbian
Tizen
Ubuntu Touch
webOS
Windows RT
Windows Phone
Windows 10 Mobile

text: iOS 10 and earlier

text:
BSD (NetBSD, FreeBSD, OpenBSD)
OpenSolaris[119]

text:
Debian
Gentoo
Ubuntu

text: 64-bit operating systems[edit]

text: Porting to 32- or 64-bit ARM operating systems[edit]

text: Windows applications recompiled for ARM and linked with Winelib –  from the Wine project can run on 32-bit or 64-bit ARM in Linux (or FreeBSD or other compatible enough operating systems).[129][130] x86 binaries, e.g. when not specially compiled for ARM, have been demonstrated on ARM using QEMU with Wine (on Linux, macOS and more), but do not work at full speed or same capability as with Winelib.


document_title: 2018 FIFA World Cup statistics

question_text: country with most goals in world cup 2018

text: 2018 FIFA World Cup statistics

text: Goalscorers[edit]

text: There were 169 goals scored in 64 matches, for an average of 2.64 goals per match.

text: Twelve own goals were scored during the tournament, doubling the record of six set in 1998.[1]

text: 6 goals

text: Harry Kane

text: 4 goals

text:
Romelu Lukaku
 Antoine Griezmann
 Kylian Mbappé
 Cristiano Ronaldo
 Denis Cheryshev

text: 3 goals

text:
Eden Hazard
 Yerry Mina
 Mario Mandžukić
 Ivan Perišić
 Artem Dzyuba
 Diego Costa
 Edinson Cavani

text: 2 goals

text:
Sergio Agüero
 Mile Jedinak
 Philippe Coutinho
 Neymar
 Luka Modrić
 Mohamed Salah
 John Stones
 Takashi Inui
 Ahmed Musa
 Son Heung-min
 Andreas Granqvist
 Wahbi Khazri
 Luis Suárez

text: 1 goal

text:
Ángel Di María
 Gabriel Mercado
 Lionel Messi
 Marcos Rojo
 Michy Batshuayi
 Nacer Chadli
 Kevin De Bruyne
 Marouane Fellaini
 Adnan Januzaj
 Dries Mertens
 Thomas Meunier
 Jan Vertonghen
 Roberto Firmino
 Paulinho
 Renato Augusto
 Thiago Silva
 Juan Cuadrado
 Radamel Falcao
 Juan Fernando Quintero
 Kendall Waston
 Milan Badelj
 Andrej Kramarić
 Ivan Rakitić
 Ante Rebić
 Domagoj Vida
 Christian Eriksen
 Mathias Jørgensen
 Yussuf Poulsen
 Dele Alli
 Jesse Lingard
 Harry Maguire
 Kieran Trippier
 Benjamin Pavard
 Paul Pogba
 Samuel Umtiti
 Raphaël Varane
 Toni Kroos
 Marco Reus
 Alfreð Finnbogason
 Gylfi Sigurðsson
 Karim Ansarifard
 Genki Haraguchi
 Keisuke Honda
 Shinji Kagawa
 Yuya Osako
 Javier Hernández
 Hirving Lozano
 Carlos Vela
 Khalid Boutaïb
 Youssef En-Nesyri
 Victor Moses
 Felipe Baloy
 André Carrillo
 Paolo Guerrero
 Jan Bednarek
 Grzegorz Krychowiak
 Pepe
 Ricardo Quaresma
 Mário Fernandes
 Yury Gazinsky
 Aleksandr Golovin
 Salem Al-Dawsari
 Salman Al-Faraj
 Sadio Mané
 M'Baye Niang
 Moussa Wagué
 Aleksandar Kolarov
 Aleksandar Mitrović
 Kim Young-gwon
 Iago Aspas
 Isco
 Nacho
 Ludwig Augustinsson
 Emil Forsberg
 Ola Toivonen
 Josip Drmić
 Blerim Džemaili
 Xherdan Shaqiri
 Granit Xhaka
 Steven Zuber
 Dylan Bronn
 Ferjani Sassi
 Fakhreddine Ben Youssef
 José Giménez

text: 1 own goal

text:
Aziz Behich (against France)
 Fernandinho (against Belgium)
 Mario Mandžukić (against France)
 Ahmed Fathy (against Russia)
 Edson Álvarez (against Sweden)
 Aziz Bouhaddouz (against Iran)
 Oghenekaro Etebo (against Croatia)
 Thiago Cionek (against Senegal)
 Denis Cheryshev (against Uruguay)
 Sergei Ignashevich (against Spain)
 Yann Sommer (against Costa Rica)
 Yassine Meriah (against Panama)

text: Source: FIFA[2]

text: Assists[edit]

text: 2 assists

text:
Éver Banega
 Lionel Messi
 Kevin De Bruyne
 Eden Hazard
 Thomas Meunier
 Youri Tielemans
 Philippe Coutinho
 Juan Fernando Quintero
 James Rodríguez
 Antoine Griezmann
 Lucas Hernández
 Artem Dzyuba
 Aleksandr Golovin
 Viktor Claesson
 Wahbi Khazri
 Carlos Sánchez

text: 1 assist

text:
Gabriel Mercado
 Marcos Rojo
 Toby Alderweireld
 Nacer Chadli
 Romelu Lukaku
 Dries Mertens
 Douglas Costa
 Gabriel Jesus
 Neymar
 Willian
 Juan Cuadrado
 Joel Campbell
 Milan Badelj
 Marcelo Brozović
 Mateo Kovačić
 Mario Mandžukić
 Luka Modrić
 Ivan Perišić
 Josip Pivarić
 Domagoj Vida
 Šime Vrsaljko
 Thomas Delaney
 Christian Eriksen
 Nicolai Jørgensen
 Abdallah Said
 Jesse Lingard
 Harry Maguire
 Raheem Sterling
 Kieran Trippier
 Ashley Young
 Olivier Giroud
 Corentin Tolisso
 Mario Gómez
 Marco Reus
 Keisuke Honda
 Takashi Inui
 Shinji Kagawa
 Yuto Nagatomo
 Gaku Shibasaki
 Javier Hernández
 Hirving Lozano
 Fayçal Fajr
 Victor Moses
 Kenneth Omeruo
 Ricardo Ávila
 Paolo Guerrero
 Kamil Grosicki
 Rafał Kurzawa
 Gonçalo Guedes
 Raphaël Guerreiro
 João Moutinho
 Adrien Silva
 Alan Dzagoev
 Mário Fernandes
 Ilya Kutepov
 Roman Zobnin
 Abdullah Otayf
 M'Baye Niang
 Dušan Tadić
 Lee Jae-sung
 Ju Se-jong
 Sergio Busquets
 Dani Carvajal
 Andrés Iniesta
 Ola Toivonen
 Breel Embolo
 Mario Gavranović
 Xherdan Shaqiri
 Denis Zakaria
 Oussama Haddadi
 Hamdi Nagguez
 Rodrigo Bentancur
 Luis Suárez

text: Source: FIFA

text: Scoring[edit]

text: Overall[edit]

text:
Total number of goals scored: 169
Average goals per match: 2.64
Total number of braces: 10  Edinson Cavani, Denis Cheryshev, Diego Costa, Eden Hazard, Harry Kane, Romelu Lukaku (2), Kylian Mbappé, Ahmed Musa, John Stones
Total number of hat-tricks: 2  Harry Kane, Cristiano Ronaldo
Total number of penalty kicks awarded: 29
Total number of penalty kicks scored: 22  Salman Al-Faraj, Karim Ansarifard, Artem Dzyuba, Andreas Granqvist (2), Antoine Griezmann (3), Eden Hazard, Mile Jedinak (2), Shinji Kagawa, Harry Kane (3), Luka Modrić, Victor Moses, Cristiano Ronaldo, Mohamed Salah, Ferjani Sassi, Gylfi Sigurðsson, Carlos Vela
Total number of penalty kicks missed or saved: 7  Fahad Al-Muwallad, Christian Cueva, Lionel Messi, Luka Modrić, Cristiano Ronaldo, Bryan Ruiz, Gylfi Sigurðsson
Penalty kick success rate: 7001758600000000000♠75.86%
Own goals scored: 12  Edson Álvarez, Aziz Behich, Aziz Bouhaddouz, Denis Cheryshev, Thiago Cionek, Oghenekaro Etebo, Ahmed Fathy, Fernandinho, Sergei Ignashevich, Mario Mandžukić, Yassine Meriah, Yann Sommer

text: Timing[edit]

text:
First goal of the tournament: Yury Gazinsky for Russia against Saudi Arabia
First brace of the tournament: Denis Cheryshev for Russia against Saudi Arabia
First hat-trick of the tournament: Cristiano Ronaldo for Portugal against Spain
Last goal of the tournament: Mario Mandžukić for Croatia against France
Last brace of the tournament: Edinson Cavani for Uruguay against Portugal
Last hat-trick of the tournament: Harry Kane for England against Panama
Fastest goal in a match from kickoff: 1st minute  Mathias Jørgensen for Denmark against Croatia
Fastest goal in a match after coming on as a substitute: 1st minute  Artem Dzyuba for Russia against Saudi Arabia (introduced in the 70th minute)
Latest goal in a match without extra time: 90+7th minute  Neymar for Brazil against Costa Rica
Latest goal in a match with extra time: 115th minute  Mário Fernandes for Russia against Croatia
Latest winning goal in a match without extra time: 90+5th minute  Aziz Bouhaddouz (own goal) for Iran against Morocco, Toni Kroos for Germany against Sweden, Salem Al-Dawsari for Saudi Arabia against Egypt
Latest winning goal in a match with extra time: 109th minute  Mario Mandžukić for Croatia against England
Shortest time difference between two goals scored by the same team in a match: 3 minutes  Diego Costa and Nacho for Spain against Portugal

text: Teams[edit]

text:
Most goals scored by a team: 16  Belgium
Fewest goals scored by a team: 2  Australia, Costa Rica, Egypt, Germany, Iceland, Iran, Morocco, Panama, Peru, Poland, Saudi Arabia, Serbia
Most goals conceded by a team: 11  Panama
Fewest goals conceded by a team: 2  Denmark, Iran, Peru
Best goal difference: +10  Belgium
Worst goal difference: -9  Panama
Most goals scored in a match by both teams: 7  Belgium 5–2 Tunisia, England 6–1 Panama, France 4–3 Argentina
Most goals scored in a match by one team: 6  England against Panama
Most goals scored in a match by the losing team: 3  Argentina against France
Biggest margin of victory: 5 goals  Russia 5–0 Saudi Arabia, England 6–1 Panama
Most clean sheets achieved by a team: 4  France
Fewest clean sheets achieved by a team: 0  Argentina, Australia, Costa Rica, Egypt, Germany, Iceland, Japan, Morocco, Panama, Saudi Arabia, Senegal, Switzerland, Tunisia
Most clean sheets given by an opposing team: 2  Costa Rica, England, Germany, Mexico, Morocco, Peru, Saudi Arabia
Fewest clean sheets given by an opposing team: 0  Brazil, Colombia, Croatia, Portugal, Spain, Tunisia
Most consecutive clean sheets achieved by a team: 3  Brazil, Uruguay
Most consecutive clean sheets given by an opposing team: 2  Costa Rica, Mexico, Morocco, Peru, Saudi Arabia

text: Individual[edit]

text:
Most goals scored by an individual: 6  Harry Kane
Most assists provided by an individual: 2  Éver Banega, Nacer Chadli, Viktor Claesson, Philippe Coutinho, Kevin De Bruyne, Artem Dzyuba, Aleksandr Golovin, Antoine Griezmann, Eden Hazard, Lucas Hernández, Lionel Messi, Thomas Meunier, Juan Fernando Quintero, James Rodríguez, Carlos Andrés Sánchez, Youri Tielemans, Wahbi Khazri
Most goals and assists produced by an individual: 6  Antoine Griezmann (4 goals, 2 assists), Harry Kane (6 goals)
Most clean sheets achieved by a goalkeeper: 3  Alisson, Thibaut Courtois, Hugo Lloris, Fernando Muslera, Robin Olsen
Most consecutive clean sheets achieved by a goalkeeper: 3  Alisson, Fernando Muslera
Most goals scored by one player in a match: 3  Harry Kane for England against Panama, Cristiano Ronaldo for Portugal against Spain
Oldest goal scorer: 37 years, 120 days  Felipe Baloy for Panama against England
Youngest goal scorer: 19 years, 183 days  Kylian Mbappé for France against Peru

text: Wins and losses[edit]

text:
Most wins: 6 – Belgium, France
Fewest wins: 0 – Australia, Costa Rica, Egypt, Iceland, Morocco, Panama
Most losses: 3 – Egypt, England, Panama
Fewest losses: 0 – Denmark, France, Spain
Most draws: 3 – Denmark, Spain
Fewest draws: 0 – Belgium, Egypt, Germany, Mexico, Nigeria, Panama, Peru, Poland, Saudi Arabia, Serbia, South Korea, Sweden, Tunisia, Uruguay
Most points in the group stage: 9 – Belgium, Croatia, Uruguay
Fewest points in the group stage: 0 – Egypt, Panama

text: Match awards[edit]

text: Man of the Match[edit]

text:
Rank

Name

Team

Opponent

Awards

1

Antoine Griezmann
 France

Australia (GS),[3] Uruguay (QF),[4] Croatia (F)[5]

3

Eden Hazard
 Belgium

Tunisia (GS),[6] Japan (R16),[7] England (TP)[8]

Harry Kane
 England

Tunisia (GS),[9] Panama (GS),[10] Colombia (R16)[11]

Luka Modrić
 Croatia

Nigeria (GS),[12] Argentina (GS),[13] Russia (QF)[14]

5

Denis Cheryshev
 Russia

Saudi Arabia (GS),[15] Egypt (GS)[16]

2

Philippe Coutinho
 Brazil

Switzerland (GS),[17] Costa Rica (GS)[18]

Kylian Mbappé
 France

Peru (GS),[19] Argentina (R16)[20]

Cristiano Ronaldo
 Portugal

Spain (GS),[21] Morocco (GS)[22]

Luis Suárez
 Uruguay

Saudi Arabia (GS),[23] Russia (GS)[24]

10

Igor Akinfeev
 Russia

Spain (R16)[25]

1

Ludwig Augustinsson
 Sweden

Mexico (GS)[26]

Milan Badelj
 Croatia

Iceland (GS)[27]

Jan Bednarek
 Poland

Japan (GS)[28]

Fakhreddine Ben Youssef
 Tunisia

Panama (GS)[29]

André Carrillo
 Peru

Australia (GS)[30]

Edinson Cavani
 Uruguay

Portugal (R16)[31]

Cho Hyun-woo
 South Korea

Germany (GS)[32]

Diego Costa
 Spain

Iran (GS)[33]

Kevin De Bruyne
 Belgium

Brazil (QF)[34]

Blerim Džemaili
  Switzerland

Costa Rica (GS)[35]

Mohamed El-Shenawy
 Egypt

Uruguay (GS)[36]

Christian Eriksen
 Denmark

Australia (GS)[37]

Emil Forsberg
 Sweden

Switzerland (R16)[38]

Andreas Granqvist
 Sweden

South Korea (GS)[39]

Hannes Þór Halldórsson
 Iceland

Argentina (GS)[40]

Amine Harit
 Morocco

Iran (GS)[41]

Javier Hernández
 Mexico

South Korea (GS)[42]

 Isco
 Spain

Morocco (GS)[43]

Adnan Januzaj
 Belgium

England (GS)[44]

N'Golo Kanté
 France

Denmark (GS)[45]

Aleksandar Kolarov
 Serbia

Costa Rica (GS)[46]

Hirving Lozano
 Mexico

Germany (GS)[47]

Romelu Lukaku
 Belgium

Panama (GS)[48]

Sadio Mané
 Senegal

Japan (GS)[49]

Lionel Messi
 Argentina

Nigeria (GS)[50]

Yerry Mina
 Colombia

Senegal (GS)[51]

Ahmed Musa
 Nigeria

Iceland (GS)[52]

 Neymar
 Brazil

Mexico (R16)[53]

M'Baye Niang
 Senegal

Poland (GS)[54]

Yuya Osako
 Japan

Colombia (GS)[55]

 Paulinho
 Brazil

Serbia (GS)[56]

Ivan Perišić
 Croatia

England (SF)[57]

Jordan Pickford
 England

Sweden (QF)[58]

Yussuf Poulsen
 Denmark

Peru (GS)[59]

Ricardo Quaresma
 Portugal

Iran (GS)[60]

Marco Reus
 Germany

Sweden (GS)[61]

James Rodríguez
 Colombia

Poland (GS)[62]

Mohamed Salah
 Egypt

Saudi Arabia (GS)[63]

Kasper Schmeichel
 Denmark

Croatia (R16)[64]

Xherdan Shaqiri
  Switzerland

Serbia (GS)[65]

Samuel Umtiti
 France

Belgium (SF)[66]

text: Clean sheets[edit]

text:
Rank

Name
Team

Opponent

Awards

1

 Alisson
 Brazil

Costa Rica (GS), Serbia (GS), Mexico (R16)

3

Thibaut Courtois
 Belgium

Panama (GS), England (GS), England (TP)

Hugo Lloris
 France

Peru (GS), Uruguay (QF), Belgium (SF)

Fernando Muslera
 Uruguay

Egypt (GS), Saudi Arabia (GS), Russia (GS)

Robin Olsen
 Sweden

South Korea (GS), Mexico (GS), Switzerland (R16)

6

David Ospina
 Colombia

Poland (GS), Senegal (GS)

2

Kasper Schmeichel
 Denmark

Peru (GS), France (GS)

Danijel Subašić
 Croatia

Nigeria (GS), Argentina (GS)

9

Igor Akinfeev
 Russia

Saudi Arabia (GS)

1

Alireza Beiranvand
 Iran

Morocco (GS)

David de Gea
 Spain

Iran (GS)

Łukasz Fabiański
 Poland

Japan (GS)

Pedro Gallese
 Peru

Australia (GS)

Jo Hyeon-woo
 South Korea

Germany (GS)

Steve Mandanda
 France

Denmark (GS)

Guillermo Ochoa
 Mexico

Germany (GS)

Rui Patrício
 Portugal

Morocco (GS)

Jordan Pickford
 England

Sweden (QF)

Vladimir Stojković
 Serbia

Costa Rica (GS)

Francis Uzoho
 Nigeria

Iceland (GS)

text: Squads[edit]

text: Coaches[edit]

text:
Oldest coach: Óscar Tabárez  Uruguay - 71 years and 104 days in the first game against Egypt, after Otto Rehhagel (71 years and 317 days at the 2010 World Cup), he is the second oldest World Cup coach.[67]
Youngest coach: Aliou Cissé  Senegal - 42 years and 87 days in the first game against Poland.
Country with most coaches:  Argentina with four coaches, alongside Argentina, Egypt, Colombia and Peru are coached by Argentines. This is followed by  Spain with three coaches (Belgium, Saudi Arabia and Spain), then Germany, France, Colombia (with the Colombian coaches serving only other teams as in 2014) and Portugal with two coaches each.
Teams with foreign coaches: Twelve teams are trained by foreign coaches, including two teams (Australia and Denmark) of coaches whose home countries (Netherlands and Norway) did not qualify for the 2018 World Cup.
Longest serving coach: As in 2014, the longest serving team coaches of the World Cup are Joachim Löw and Óscar Tabárez, who have been in charge of the German and Uruguayan national teams since 2006. Tabárez, however, was previously coach of Uruguay from 1988 to 1990, while Löw have worked as an assistant coach for Germany since 2004. Besides them, Didier Deschamps  France, José Pékerman  Colombia and Carlos Queiroz  Iran were at the 2014 World Cup with their current teams and Jorge Sampaoli  Argentina with Chile and Fernando Santos  Portugal with Greece at the 2014 World Cup.
Shortest serving coach: The coach having the shortest time in charge is Fernando Hierro  Spain, who became in charge only two days before his team's first game. In addition to him were Mladen Krstajić  Serbia, Bert van Marwijk  Australia, Akira Nishino  Japan and Juan Antonio Pizzi  Saudi Arabia who resumed duty as coach only after the successful qualification of their current teams. Of these, however, van Marwijk had qualified with Saudi Arabia for the World Cup, but then refused to renew his contract.
Coaches who were former players: Didier Deschamps (France / 1998) became world champion having previously contested as a player, equaling the record of Mário Zagallo and Franz Beckenbauer. Beside him, Aliou Cissé (Senegal / 2002), Gareth Southgate (England / 1998), Óscar Ramírez (Costa Rica / 1990), Adam Nawałka (Poland / 1978), Stanislav Cherchesov (Russia / 1994 and unused in 2002) and Mladen Krstajić (Serbia / 2006 with Serbia & Montenegro) were also coaches who previously played at the World Cup.

text: Players[edit]

text:
Appearance record: Rafael Márquez  Mexico participated in the World Cup for the fifth time, equaling the record of compatriot Antonio Carbajal and Germany player Lothar Matthäus
Oldest player: At 45 years and five months, Essam El-Hadary  Egypt is the oldest player ever to be nominated for a World Cup finals. By his use in the last group match on June 25, he was 45 years and 161 days, thereby becoming the oldest World Cup player.[68]
Youngest player: Daniel Arzani  Australia is the youngest player at the age of 19 years and 163 days. He came on in the group match against France in the 84th minute.[69]
Sofyan Amrabat  Morocco, who came on as a substitute for his brother Nordin Amrabat in the 76th minute in the group match against Iran, is the first player in World Cup history to come in for his brother.[67]
Aleksandr Yerokhin  Russia is the first player to feature as the fourth substitute player in a World Cup match - coming on in the 97th minute of extra time in the Round of 16 match against Spain. This match is also the first ever World Cup match in which eight players have been substituted.[70]
30 teams nominated at least one player from the domestic league, but only England exclusively fielded players of its own domestic league.[71] By contrast, Sweden and Senegal nominated only players from foreign leagues.
The most number of players (129) are active in clubs based in England, the majority of them in the Premier League, with some in the lower leagues. In total 27 of the 32 team squads have players who play in England.
One player each plays in the leagues of Finland, Guinea, Honduras, Norway, Paraguay, Romania, Slovakia and South Africa.
From the leagues of countries that did not qualify for the World Cup, the Italian Serie A have the strongest representation with 58 players.

text: Discipline[edit]

text:
Total number of yellow cards: 219
Average yellow cards per match: 3.42
Total number of red cards: 4
Average red cards per match: 0.06
First yellow card of the tournament:Aleksandr Golovin for Russia against Saudi Arabia
First red card of the tournament:Carlos Sánchez Moreno for Colombia against Japan
Fastest yellow card from kick off: 1st minute  Jesús Gallardo for Mexico against Sweden
Fastest yellow card after coming on as a substitute: 1st minute  Vedran Ćorluka for Croatia against Argentina (introduced in the 90+3th minute)
Latest yellow card in a match without extra time: 90+8th minute  Aleksandar Prijović for Serbia against Costa Rica, Cédric Soares for Portugal against Iran
Latest yellow card in a match with extra time: 118th minute  Juan Cuadrado for Colombia against England
Fastest dismissal from kick off: 3rd minute  Carlos Sánchez Moreno for Colombia against Japan
Latest dismissal in a match without extra time: 90+4th minute  Michael Lang for Switzerland against Sweden
Shortest time difference between two yellow cards given to the same player: 9 minutes  Igor Smolnikov for Russia against Uruguay (booked in the 27th minute and again in the 36th minute)
Most yellow cards (team): 15  Croatia
Most red cards (team): 1  Colombia, Germany, Russia, Switzerland
Fewest yellow cards (team): 1  Saudi Arabia
Most yellow cards (player): 3  Sebastian Larsson
Most red cards (player): 1  Jérôme Boateng, Michael Lang, Carlos Sánchez Moreno, Igor Smolnikov
Most yellow cards (match): 8  Belgium vs Panama, France vs Argentina, Colombia vs England
Most red cards (match): 1  Colombia vs Japan, Germany vs Sweden, Uruguay vs Russia, Sweden vs Switzerland
Fewest yellow cards (match): 0  Argentina vs Iceland, Uruguay vs Saudi Arabia
Most cards in one match: 8 yellow cards  Belgium vs Panama, France vs Argentina, Colombia vs England

text: Multiple World Cups[edit]

text: In order of achieving the tally.

text:
Name

 2006

 2010

 2014

 2018

Total goals

Goals
Against

Goals
Against

Goals
Against

Goals
Against

 Cristiano Ronaldo

1
IRN

1
PRK

1
GHA

4
ESP (3), MAR

7

text:
Name

 2006

 2010

 2014

 2018

Total goals

Goals
Against

Goals
Against

Goals
Against

Goals
Against

 Luis Suárez

N/A

3
MEX, KOR (2)

2
ENG (2)

2
KSA, RUS

7

 Javier Hernández

N/A

2
FRA, ARG

1
CRO

1
KOR

4

 Keisuke Honda

N/A

2
CMR, DEN

1
CIV

1
SEN

4

 Edinson Cavani

N/A

1
GER

1
CRC

3
RUS, POR (2)

5

 Lionel Messi

1
SCG

0
N/A

4
BIH, IRN, NGA (2)

1
NGA

6

text: Messi played in 2010 but did not score.

text:
Name

 2002

 2006

 2010

 2014

 2018

Total

Apps
Against

Apps
Against

Apps
Against

Apps
Against

Apps
Against

 Rafael Márquez

4
CRO, ECU, ITA, USA

4
IRN, ANG, POR, ARG

4
RSA, FRA, URU, ARG

4
CMR, BRA, CRO, NED

3
GER, KOR, BRA

19

text: Márquez became the first player to captain his team in five different World Cups.

text:
Name

 2006

 2010

 2014

 2018

Total

Apps
Against

Apps
Against

Apps
Against

Apps
Against

 Cristiano Ronaldo

6
ANG, IRN, NED, ENG, FRA, GER

4
CIV, PRK, BRA, ESP

3
GER, USA, GHA

4
ESP, MAR, IRN, URU

17

 Andrés Iniesta

1
KSA

6
SUI, CHI, POR, PAR, GER, NED

3
NED, CHI, AUS

4
POR, IRN, MAR, RUS

14

 Sergio Ramos

3
UKR, TUN, FRA

7
SUI, HON, CHI, POR, PAR, GER, NED

3
NED, CHI, AUS

4
POR, IRN, MAR, RUS

17

 Javier Mascherano

5
CIV, SCG, NED, MEX, GER

4
NGA, KOR, MEX, GER

7
BIH, IRN, NGA, SUI, BEL, NED, GER

4
ISL, CRO, NGA, FRA

20

 Lionel Messi

3
SCG, NED, MEX

5
NGA, KOR, GRE, MEX, GER

7
BIH, IRN, NGA, SUI, BEL, NED, GER

4
ISL, CRO, NGA, FRA

19

 Andrés Guardado

1
ARG

3
RSA, URU, ARG

4
CMR, BRA, CRO, NED

4
GER, KOR, SWE, BRA

12

 Valon Behrami

1
KOR

1
CHI

4
ECU, FRA, HON, ARG

4
BRA, SRB, CRC, SWE

10

 Tim Cahill

4
JPN, BRA, CRO, ITA

2
GER, SRB

2
CHI, NED

1
PER

9

text: Overall results[edit]

text: Bold numbers indicate the maximum values in each column.

text: By team[edit]

text:
Team

Pld

W

D

L

Pts

APts

GF

AGF

GA

AGA

GD

AGD

CS

ACS

YC

AYC

RC

ARC

 Argentina

4

1

1

2

4

1.00

6
1.50

9
2.25

-3
-0.75

0

0.00

11

2.75

0

0.00

 Australia

3

0

1

2

1

0.33

2
0.67

5
1.67

-3
-1.00

0

0.00

7

2.33

0

0.00

 Belgium

7

6

0

1

18

2.57

16
2.29

6
0.86

+10
1.43

3

0.43

11

1.57

0

0.00

 Brazil

5

3

1

1

10

2.00

8
1.60

3
0.60

+5
1.00

3

0.60

7

1.40

0

0.00

 Colombia

4

2

1

1

7

1.75

6
1.50

3
0.75

+3
0.75

2

0.50

9

2.25

1

0.25

 Costa Rica

3

0

1

2

1

0.33

2
0.67

5
1.67

-3
-1.00

0

0.00

6

2.00

0

0.00

 Croatia

7

4

2

1

14

2.00

14
2.00

9
1.29

+5
0.71

2

0.29

15

2.14

0

0.00

 Denmark

4

1

3

0

6

1.50

3
0.75

2
0.50

+1
0.25

2

0.50

6

1.50

0

0.00

 Egypt

3

0

0

3

0

0.00

2
0.67

6
2.00

-4
-1.33

0

0.00

5

1.67

0

0.00

 England

7

3

1

3

10

1.43

12
1.71

8
1.14

+4
0.57

1

0.14

8

1.14

0

0.00

 France

7

6

1

0

19

2.71

14
2.00

6
0.86

+8
1.14

4

0.57

12

1.71

0

0.00

 Germany

3

1

0

2

3

1.00

2
0.67

4
1.33

-2
-0.67

0

0.00

2

0.67

1

0.33

 Iceland

3

0

1

2

1

0.33

2
0.67

5
1.67

-3
-1.00

0

0.00

3

1.00

0

0.00

 Iran

3

1

1

1

4

1.33

2
0.67

2
0.67

0
0.00

1

0.33

7

2.33

0

0.00

 Japan

4

1

1

2

4

1.00

6
1.50

7
1.75

-1
-0.25

0

0.00

5

1.25

0

0.00

 Mexico

4

2

0

2

6

1.50

3
0.75

6
1.50

-3
-0.75

1

0.25

9

2.25

0

0.00

 Morocco

3

0

1

2

1

0.33

2
0.67

4
1.33

-2
-0.67

0

0.00

8

2.67

0

0.00

 Nigeria

3

1

0

2

3

1.00

3
1.00

4
1.33

-1
-0.33

1

0.33

4

1.33

0

0.00

 Panama

3

0

0

3

0

0.00

2
0.67

11
3.67

-9
-3.00

0

0.00

11

3.67

0

0.00

 Peru

3

1

0

2

3

1.00

2
0.67

2
0.67

0
0.00

1

0.33

5

1.67

0

0.00

 Poland

3

1

0

2

3

1.00

2
0.67

5
1.67

-3
-1.00

1

0.33

3

1.00

0

0.00

 Portugal

4

1

2

1

5

1.25

6
1.50

6
1.50

0
0.00

1

0.25

7

1.75

0

0.00

 Russia

5

2

2

1

8

1.60

11
2.20

7
1.40

+4
0.80

1

0.20

6

1.20

1

0.20

 Saudi Arabia

3

1

0

2

3

1.00

2
0.67

7
2.33

-5
-1.67

0

0.00

1

0.33

0

0.00

 Senegal

3

1

1

1

4

1.33

4
1.33

4
1.33

0
0.00

0

0.00

6

2.00

0

0.00

 Serbia

3

1

0

2

3

1.00

2
0.67

4
1.33

-2
-0.67

1

0.33

9

3.00

0

0.00

 South Korea

3

1

0

2

3

1.00

3
1.00

3
1.00

0
0.00

1

0.33

10

3.33

0

0.00

 Spain

4

1

3

0

6

1.50

7
1.75

6
1.50

+1
0.25

1

0.25

2

0.50

0

0.00

 Sweden

5

3

0

2

9

1.80

6
1.20

4
0.80

+2
0.40

3

0.60

8

1.60

0

0.00

  Switzerland

4

1

2

1

5

1.25

5
1.25

5
1.25

0
0.00

0

0.00

9

2.25

1

0.25

 Tunisia

3

1

0

2

3

1.00

5
1.67

8
2.67

-3
-1.00

0

0.00

4

1.33

0

0.00

 Uruguay

5

4

0

1

12

2.40

7
1.40

3
0.60

+4
0.80

3

0.60

3

0.60

0

0.00

Total

64(1)

51

13(2)

51

179

1.40

169

1.32

169

1.32

0

0.00

33

0.26

219

1.71

4

0.03

text: Team(s) rendered in italics represent(s) the host nation(s). The competition's winning team is rendered in bold.(1) – Total games lost not counted in total games played (total games lost = total games won)(2) – Total number of games drawn (tied) for all teams = Total number of games drawn (tied) ÷ 2 (both teams involved)(3) – As per statistical convention in football, matches decided in extra time are counted as wins and losses, while matches decided by penalty shoot-outs are counted as draws.

text: By confederation[edit]

text:
Confederation

T

Pld

W

D

L

Pts

APts

Pts/T

AFC
5
16
4
3
9
15
0.94
3.00

CAF
5
15
3
2
10
11
0.73
2.20

CONCACAF
3
10
2
1
7
7
0.70
2.33

CONMEBOL
5
21
11
3
7
36
1.71
7.20

UEFA
14
66
31
17
18
110
1.67
7.86

Total

32

64(1)

51

13(2)

51

179

1.40

5.59

text: Host nation(s) are situated in the region(s) rendered in italics.(1) – Total games lost not counted in total games played (total games lost = total games won)(2) – Total number of games drawn (tied) for all teams = Total number of games drawn (tied) ÷ 2 (both teams involved)(3) – As per statistical convention in football, matches decided in extra time are counted as wins and losses, while matches decided by penalty shoot-outs are counted as draws.

text: Stadiums[edit]

text:
Stadium

City

Capacity

Elevation

Matchesplayed

Overallattendance

Averageattendanceper match

Averageattendanceas % of capacity

Overallgoalsscored

Averagegoals scoredper match

Central Stadium

Yekaterinburg

33,061[72]

273 m[73]

4

125,437

31,359

94.85%

9

2.25

Cosmos Arena

Samara

41,970[74]

163 m[75]

6

248,060

41,343

98.51%

11

1.83

Fisht Olympic Stadium

Sochi

44,287[76]

1 m[77]

6

264,057

44,010

99.37%

21

3.50

Kaliningrad Stadium

Kaliningrad

33,973[78]

0 m

4

132,249

33,062

97.32%

10

2.50

Kazan Arena

Kazan

42,873[79]

51 m[80]

6

254,451

42,409

98.92%

19

3.17

Krestovsky Stadium

Saint Petersburg

64,468[81]

13 m[82]

7

448,686

64,098

99.43%

14

2.00

Luzhniki Stadium

Moscow

78,011[83]

151 m[84]

7

546,077

78,011

100.00%

18

2.57

Mordovia Arena

Saransk

41,685[85]

126 m[86]

4

160,237

40,059

96.10%

9

2.25

Nizhny Novgorod Stadium

Nizhny Novgorod

43,319[87]

73 m[88]

6

256,427

42,738

98.66%

19

3.17

Otkritie Arena

Moscow

44,190[89]

125 m[90]

5

220,950

44,190

100.00%

16

3.20

Rostov Arena

Rostov-on-Don

43,472[91]

0 m

5

214,197

42,839

98.54%

14

2.80

Volgograd Arena

Volgograd

43,713[92]

31 m[93]

4

160,980

40,245

92.07%

9

2.25

Total
3,080,085

64
3,031,768
47,371
98.43%
169
2.64

text: Attendance records[edit]

text: Top 10 highest attendances.

text:
Rank
Attendance
Match
Venue
City
Date
Ref

1

78,011

 Russia vs  Saudi Arabia

Luzhniki Stadium

Moscow

14 June 2018

[94]

 Germany vs  Mexico

17 June 2018

[95]

 Portugal vs  Morocco

20 June 2018

[96]

 Denmark vs  France

26 June 2018

[97]

 Spain vs  Russia

1 July 2018

[98]

 Croatia vs  England

11 July 2018

[99]

 France vs  Croatia

15 July 2018

[100]

8

64,468

 Russia vs  Egypt

Krestovsky Stadium

Saint Petersburg

19 June 2018

[101]

 Brazil vs  Costa Rica

22 June 2018

[102]

 Nigeria vs  Argentina

26 June 2018

[103]

text: Lowest attendance: 27,015 –  Egypt vs  Uruguay, Central Stadium, Yekaterinburg, 15 June 2018[104]


document_title: Premier League Manager of the Season

question_text: when is manager of the year announced premier league

text: Premier League Manager of the Season

text: History[edit]

text: The Premier League was formed in 1992, when the members of the First Division resigned from The Football League. These clubs set up a new commercially independent league that negotiated its own broadcast and sponsorship agreements.[7] The inaugural season had no sponsor until Carling agreed to a four-year £12 million deal that started the following season.[8] That same season, Carling introduced the Manager of the Month and Manager of the Season awards,[9] in addition to the existing manager of the year award presented by the League Managers Association.

text: The first Manager of the Season award was presented to Alex Ferguson after winning the Premier League with Manchester United for the second consecutive season.[3] Kenny Dalglish was awarded the accolade in the 1994–95 season, having guided Blackburn Rovers to their first league title in 81 years.[10][11] Despite losing to Liverpool on the final matchday, Blackburn secured the championship when Manchester United failed to beat West Ham United the same day.[12] Manchester United regained the Premier League the following season, resisting Newcastle United's threat, and successfully retained the championship in 1996–97, ensuring that Ferguson became the first manager to win two consecutive awards.[13]

text: Arsène Wenger was the first non–British manager to receive the Manager of the Season award, having led Arsenal to the top of the Premier League in 1997–98, his first full season at the club.[14] This achievement was significant given that Arsenal were, at one stage, 12 points behind leaders Manchester United.[15] After a climactic finish to the 1998–99 season, Ferguson was presented with his fifth managerial award for winning the Premier League with Manchester United.[16] The club beat Tottenham Hotspur on the last matchday to secure their fifth championship in seven years, and in the following week completed a treble of trophies consisting of the domestic league, FA Cup and UEFA Champions League. Ferguson received the accolade again in 1999–2000, as Manchester United finished 18 points above second-placed Arsenal.[17]

text: Ipswich Town manager George Burley was the winner in 2000–01, the first time the award did not go to a league-winning manager.[4] Ipswich Town, who won promotion to the Premier League from the First Division in the previous season, finished fifth and qualified for the UEFA Cup.[18] Burley triumphed over Ferguson, who led Manchester United to their third consecutive championship title, and Liverpool manager Gérard Houllier, who guided his team to three trophies and a berth in the Champions League.[4] Wenger was named the Manager of the Season for 2001–02 after guiding Arsenal to thirteen consecutive wins towards the end of the season – a run which ensured the club regained the Premier League trophy.[19] For winning his eighth Premier League title with Manchester United, Ferguson was given the award in the 2002–03 season.[20] Wenger was the outstanding winner for the award in 2003–04 as he managed Arsenal to an unprecedented achievement of winning the league without a single defeat. Reflecting on Wenger's accomplishment, a Barclaycard Awards Panel spokesperson said "Arsène Wenger is a very worthy recipient of this accolade and has sent his team into the history books. Arsenal have played exciting attacking football throughout the season and finishing it unbeaten is a feat that may not be repeated for another 100 years."[21]

text: Chelsea manager José Mourinho was chosen as the recipient for the 2004–05 season for taking the club to its first league championship in 50 years.[22] Chelsea finished the season with a league-record 95 points,[23] 12 points ahead of runners-up Arsenal, scoring 72 goals and conceding 15 in the process.[24] Mourinho won the award a second successive time the following season – the first foreign manager to do so – as Chelsea won their second Premier League title.[25] Ferguson collected the award for the 2006–07,[26] 2007–08[1] and 2008–09[27] seasons, in a period when Manchester United regained the domestic title after a four-year drought and retained the trophy for a further two years. Tottenham manager Harry Redknapp was presented with the award at the end of the 2009–10 season, having guided the club to fourth position and a spot in the following season's Champions League at the expense of Manchester City.[28] In May 2011, Ferguson picked up his tenth Manager of the Season award for leading Manchester United to a record 19th league title.[29] In May 2012, Alan Pardew won his first Manager of the Season award after guiding Newcastle United to their highest position in nine years.[6] In May 2013, Ferguson picked up his eleventh Manager of the Season award for leading Manchester United to a record 20th league title.[30] Tony Pulis became the first Welsh recipient of the award in May 2014, for guiding Crystal Palace from bottom place to 11th.[31]

text: Winners[edit]

text:
Season
Manager
Nationality
Club
Ref

1993–94
Ferguson, AlexAlex Ferguson
 Scotland
Manchester United
[32]

1994–95
Dalglish, KennyKenny Dalglish
 Scotland
Blackburn Rovers
[33]

1995–96
Ferguson, AlexAlex Ferguson (2)
 Scotland
Manchester United
[32]

1996–97
Ferguson, AlexAlex Ferguson (3)
 Scotland
Manchester United
[32]

1997–98
Wenger, ArseneArsène Wenger
 France
Arsenal
[34]

1998–99
Ferguson, AlexAlex Ferguson (4)
 Scotland
Manchester United
[32]

1999–2000
Ferguson, AlexAlex Ferguson (5)
 Scotland
Manchester United
[32]

2000–01
Burley, GeorgeGeorge Burley
 Scotland
Ipswich Town
[4]

2001–02
Wenger, ArseneArsène Wenger (2)
 France
Arsenal
[34]

2002–03
Ferguson, AlexAlex Ferguson (6)
 Scotland
Manchester United
[32]

2003–04
Wenger, ArseneArsène Wenger (3)
 France
Arsenal
[34]

2004–05
Mourinho, JoseJosé Mourinho
 Portugal
Chelsea
[35]

2005–06
Mourinho, JoseJosé Mourinho (2)
 Portugal
Chelsea
[35]

2006–07
Ferguson, AlexAlex Ferguson (7)
 Scotland
Manchester United
[32]

2007–08
Ferguson, AlexAlex Ferguson (8)
 Scotland
Manchester United
[32]

2008–09
Ferguson, AlexAlex Ferguson (9)
 Scotland
Manchester United
[32]

2009–10
Redknapp, HarryHarry Redknapp
 England
Tottenham Hotspur
[36]

2010–11
Ferguson, AlexAlex Ferguson (10)
 Scotland
Manchester United
[32]

2011–12
Pardew, AlanAlan Pardew
 England
Newcastle United
[37]

2012–13
Ferguson, AlexAlex Ferguson (11)
 Scotland
Manchester United
[32]

2013–14
Pulis, TonyTony Pulis
 Wales
Crystal Palace
[38]

2014–15
Mourinho, JoseJosé Mourinho (3)
 Portugal
Chelsea
[35]

2015–16
Ranieri, ClaudioClaudio Ranieri
 Italy
Leicester City
[39]

2016–17
Conte, AntonioAntonio Conte
 Italy
Chelsea
[40]

2017–18
Guardiola, PepPep Guardiola
 Spain
Manchester City
[41]

text: Awards won by nationality[edit]

text:
Country
Wins

 Scotland
7001130000000000000♠13

 France
7000300000000000000♠3

 Portugal
7000300000000000000♠3

 England
7000200000000000000♠2

 Italy
7000200000000000000♠2

 Spain
7000100000000000000♠1

 Wales
7000100000000000000♠1

text: Awards won by club[edit]

text:
Club
Wins

Manchester United
7001110000000000000♠11

Chelsea
7000400000000000000♠4

Arsenal
7000300000000000000♠3

Blackburn Rovers
7000100000000000000♠1

Crystal Palace
7000100000000000000♠1

Ipswich Town
7000100000000000000♠1

Leicester City
7000100000000000000♠1

Manchester City
7000100000000000000♠1

Newcastle United
7000100000000000000♠1

Tottenham Hotspur
7000100000000000000♠1